2017-09-10 03:25:59 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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2017-08-02 08:28:10 +08:00
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=corei7-avx -mattr=+fma4 | FileCheck %s
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2014-11-07 05:46:23 +08:00
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -mattr=+avx,-fma | FileCheck %s
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; VFMADD
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define < 4 x float > @test_x86_fma_vfmadd_ss_load(< 4 x float > %a0, < 4 x float > %a1, float* %a2) {
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2017-09-10 03:25:59 +08:00
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; CHECK-LABEL: test_x86_fma_vfmadd_ss_load:
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; CHECK: # BB#0:
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; CHECK-NEXT: vfmaddss (%rdi), %xmm1, %xmm0, %xmm0
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; CHECK-NEXT: retq
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2015-02-28 05:17:42 +08:00
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%x = load float , float *%a2
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2014-11-07 05:46:23 +08:00
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%y = insertelement <4 x float> undef, float %x, i32 0
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%res = call < 4 x float > @llvm.x86.fma.vfmadd.ss(< 4 x float > %a0, < 4 x float > %a1, < 4 x float > %y)
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ret < 4 x float > %res
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}
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define < 4 x float > @test_x86_fma_vfmadd_ss_load2(< 4 x float > %a0, float* %a1, < 4 x float > %a2) {
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2017-09-10 03:25:59 +08:00
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; CHECK-LABEL: test_x86_fma_vfmadd_ss_load2:
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; CHECK: # BB#0:
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; CHECK-NEXT: vfmaddss %xmm1, (%rdi), %xmm0, %xmm0
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; CHECK-NEXT: retq
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2015-02-28 05:17:42 +08:00
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%x = load float , float *%a1
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2014-11-07 05:46:23 +08:00
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%y = insertelement <4 x float> undef, float %x, i32 0
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%res = call < 4 x float > @llvm.x86.fma.vfmadd.ss(< 4 x float > %a0, < 4 x float > %y, < 4 x float > %a2)
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ret < 4 x float > %res
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}
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declare < 4 x float > @llvm.x86.fma.vfmadd.ss(< 4 x float >, < 4 x float >, < 4 x float >) nounwind readnone
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define < 2 x double > @test_x86_fma_vfmadd_sd_load(< 2 x double > %a0, < 2 x double > %a1, double* %a2) {
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2017-09-10 03:25:59 +08:00
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; CHECK-LABEL: test_x86_fma_vfmadd_sd_load:
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; CHECK: # BB#0:
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; CHECK-NEXT: vfmaddsd (%rdi), %xmm1, %xmm0, %xmm0
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; CHECK-NEXT: retq
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2015-02-28 05:17:42 +08:00
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%x = load double , double *%a2
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2014-11-07 05:46:23 +08:00
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%y = insertelement <2 x double> undef, double %x, i32 0
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%res = call < 2 x double > @llvm.x86.fma.vfmadd.sd(< 2 x double > %a0, < 2 x double > %a1, < 2 x double > %y)
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ret < 2 x double > %res
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}
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define < 2 x double > @test_x86_fma_vfmadd_sd_load2(< 2 x double > %a0, double* %a1, < 2 x double > %a2) {
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2017-09-10 03:25:59 +08:00
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; CHECK-LABEL: test_x86_fma_vfmadd_sd_load2:
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; CHECK: # BB#0:
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; CHECK-NEXT: vfmaddsd %xmm1, (%rdi), %xmm0, %xmm0
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; CHECK-NEXT: retq
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2015-02-28 05:17:42 +08:00
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%x = load double , double *%a1
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2014-11-07 05:46:23 +08:00
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%y = insertelement <2 x double> undef, double %x, i32 0
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%res = call < 2 x double > @llvm.x86.fma.vfmadd.sd(< 2 x double > %a0, < 2 x double > %y, < 2 x double > %a2)
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ret < 2 x double > %res
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}
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declare < 2 x double > @llvm.x86.fma.vfmadd.sd(< 2 x double >, < 2 x double >, < 2 x double >) nounwind readnone
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define < 4 x float > @test_x86_fma_vfmadd_ps_load(< 4 x float > %a0, < 4 x float > %a1, < 4 x float >* %a2) {
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2017-09-10 03:25:59 +08:00
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; CHECK-LABEL: test_x86_fma_vfmadd_ps_load:
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; CHECK: # BB#0:
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; CHECK-NEXT: vfmaddps (%rdi), %xmm1, %xmm0, %xmm0
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; CHECK-NEXT: retq
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2015-02-28 05:17:42 +08:00
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%x = load <4 x float>, <4 x float>* %a2
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2014-11-07 05:46:23 +08:00
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%res = call < 4 x float > @llvm.x86.fma.vfmadd.ps(< 4 x float > %a0, < 4 x float > %a1, < 4 x float > %x)
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ret < 4 x float > %res
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}
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define < 4 x float > @test_x86_fma_vfmadd_ps_load2(< 4 x float > %a0, < 4 x float >* %a1, < 4 x float > %a2) {
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2017-09-10 03:25:59 +08:00
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; CHECK-LABEL: test_x86_fma_vfmadd_ps_load2:
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; CHECK: # BB#0:
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; CHECK-NEXT: vfmaddps %xmm1, (%rdi), %xmm0, %xmm0
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; CHECK-NEXT: retq
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2015-02-28 05:17:42 +08:00
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%x = load <4 x float>, <4 x float>* %a1
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2014-11-07 05:46:23 +08:00
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%res = call < 4 x float > @llvm.x86.fma.vfmadd.ps(< 4 x float > %a0, < 4 x float > %x, < 4 x float > %a2)
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ret < 4 x float > %res
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}
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declare < 4 x float > @llvm.x86.fma.vfmadd.ps(< 4 x float >, < 4 x float >, < 4 x float >) nounwind readnone
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; To test execution dependency
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define < 4 x float > @test_x86_fma_vfmadd_ps_load3(< 4 x float >* %a0, < 4 x float >* %a1, < 4 x float > %a2) {
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2017-09-10 03:25:59 +08:00
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; CHECK-LABEL: test_x86_fma_vfmadd_ps_load3:
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; CHECK: # BB#0:
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; CHECK-NEXT: vmovaps (%rdi), %xmm1
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; CHECK-NEXT: vfmaddps %xmm0, (%rsi), %xmm1, %xmm0
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; CHECK-NEXT: retq
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2015-02-28 05:17:42 +08:00
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%x = load <4 x float>, <4 x float>* %a0
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%y = load <4 x float>, <4 x float>* %a1
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2014-11-07 05:46:23 +08:00
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%res = call < 4 x float > @llvm.x86.fma.vfmadd.ps(< 4 x float > %x, < 4 x float > %y, < 4 x float > %a2)
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ret < 4 x float > %res
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}
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define < 2 x double > @test_x86_fma_vfmadd_pd_load(< 2 x double > %a0, < 2 x double > %a1, < 2 x double >* %a2) {
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2017-09-10 03:25:59 +08:00
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; CHECK-LABEL: test_x86_fma_vfmadd_pd_load:
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; CHECK: # BB#0:
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; CHECK-NEXT: vfmaddpd (%rdi), %xmm1, %xmm0, %xmm0
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; CHECK-NEXT: retq
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2015-02-28 05:17:42 +08:00
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%x = load <2 x double>, <2 x double>* %a2
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2014-11-07 05:46:23 +08:00
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%res = call < 2 x double > @llvm.x86.fma.vfmadd.pd(< 2 x double > %a0, < 2 x double > %a1, < 2 x double > %x)
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ret < 2 x double > %res
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}
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define < 2 x double > @test_x86_fma_vfmadd_pd_load2(< 2 x double > %a0, < 2 x double >* %a1, < 2 x double > %a2) {
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2017-09-10 03:25:59 +08:00
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; CHECK-LABEL: test_x86_fma_vfmadd_pd_load2:
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; CHECK: # BB#0:
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; CHECK-NEXT: vfmaddpd %xmm1, (%rdi), %xmm0, %xmm0
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; CHECK-NEXT: retq
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2015-02-28 05:17:42 +08:00
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%x = load <2 x double>, <2 x double>* %a1
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2014-11-07 05:46:23 +08:00
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%res = call < 2 x double > @llvm.x86.fma.vfmadd.pd(< 2 x double > %a0, < 2 x double > %x, < 2 x double > %a2)
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ret < 2 x double > %res
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}
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declare < 2 x double > @llvm.x86.fma.vfmadd.pd(< 2 x double >, < 2 x double >, < 2 x double >) nounwind readnone
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; To test execution dependency
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define < 2 x double > @test_x86_fma_vfmadd_pd_load3(< 2 x double >* %a0, < 2 x double >* %a1, < 2 x double > %a2) {
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2017-09-10 03:25:59 +08:00
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; CHECK-LABEL: test_x86_fma_vfmadd_pd_load3:
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; CHECK: # BB#0:
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; CHECK-NEXT: vmovapd (%rdi), %xmm1
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; CHECK-NEXT: vfmaddpd %xmm0, (%rsi), %xmm1, %xmm0
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; CHECK-NEXT: retq
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2015-02-28 05:17:42 +08:00
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%x = load <2 x double>, <2 x double>* %a0
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%y = load <2 x double>, <2 x double>* %a1
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2014-11-07 05:46:23 +08:00
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%res = call < 2 x double > @llvm.x86.fma.vfmadd.pd(< 2 x double > %x, < 2 x double > %y, < 2 x double > %a2)
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ret < 2 x double > %res
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}
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