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llvm-project/llvm/test/CodeGen/X86/vec_fpext.ll

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Replace more uses of sse41 with sse4.1. llc using the host cpu features and *waning* on unknown features is probably not a good thing :-( llvm-svn: 189144
2013-08-24 04:39:19 +08:00
; RUN: llc < %s -march=x86 -mattr=+sse4.1,-avx | FileCheck %s
Add an -mcpu option to a test that is apparently scheduler-sensitive. This should fix the clang-atom-d2700-ubuntu-rel buildbot. llvm-svn: 177943
2013-03-26 07:43:23 +08:00
; RUN: llc < %s -march=x86 -mcpu=corei7-avx | FileCheck --check-prefix=AVX %s
Fix type-checking for load transformation which is not legal on floating-point types. PR11674. llvm-svn: 147323
2011-12-29 05:24:44 +08:00
; PR11674
define void @fpext_frommem(<2 x float>* %in, <2 x double>* %out) {
Convert test to CHECK-LABEL llvm-svn: 213161
2014-07-16 23:37:08 +08:00
; CHECK-LABEL: fpext_frommem:
; AVX-LABEL: fpext_frommem:
Fix type-checking for load transformation which is not legal on floating-point types. PR11674. llvm-svn: 147323
2011-12-29 05:24:44 +08:00
entry:
Enhance PR11334 fix to support extload from v2f32/v4f32 - Fix an remaining issue of PR11674 as well llvm-svn: 163528
2012-09-11 02:33:51 +08:00
; CHECK: cvtps2pd (%{{.+}}), %xmm{{[0-9]+}}
; AVX: vcvtps2pd (%{{.+}}), %xmm{{[0-9]+}}
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%0 = load <2 x float>, <2 x float>* %in, align 8
Fix type-checking for load transformation which is not legal on floating-point types. PR11674. llvm-svn: 147323
2011-12-29 05:24:44 +08:00
%1 = fpext <2 x float> %0 to <2 x double>
store <2 x double> %1, <2 x double>* %out, align 1
ret void
}
Enhance PR11334 fix to support extload from v2f32/v4f32 - Fix an remaining issue of PR11674 as well llvm-svn: 163528
2012-09-11 02:33:51 +08:00
define void @fpext_frommem4(<4 x float>* %in, <4 x double>* %out) {
Convert test to CHECK-LABEL llvm-svn: 213161
2014-07-16 23:37:08 +08:00
; CHECK-LABEL: fpext_frommem4:
; AVX-LABEL: fpext_frommem4:
Enhance PR11334 fix to support extload from v2f32/v4f32 - Fix an remaining issue of PR11674 as well llvm-svn: 163528
2012-09-11 02:33:51 +08:00
entry:
; CHECK: cvtps2pd (%{{.+}}), %xmm{{[0-9]+}}
; CHECK: cvtps2pd 8(%{{.+}}), %xmm{{[0-9]+}}
; AVX: vcvtps2pd (%{{.+}}), %ymm{{[0-9]+}}
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%0 = load <4 x float>, <4 x float>* %in
Enhance PR11334 fix to support extload from v2f32/v4f32 - Fix an remaining issue of PR11674 as well llvm-svn: 163528
2012-09-11 02:33:51 +08:00
%1 = fpext <4 x float> %0 to <4 x double>
store <4 x double> %1, <4 x double>* %out, align 1
ret void
}
define void @fpext_frommem8(<8 x float>* %in, <8 x double>* %out) {
Convert test to CHECK-LABEL llvm-svn: 213161
2014-07-16 23:37:08 +08:00
; CHECK-LABEL: fpext_frommem8:
; AVX-LABEL: fpext_frommem8:
Enhance PR11334 fix to support extload from v2f32/v4f32 - Fix an remaining issue of PR11674 as well llvm-svn: 163528
2012-09-11 02:33:51 +08:00
entry:
; CHECK: cvtps2pd (%{{.+}}), %xmm{{[0-9]+}}
; CHECK: cvtps2pd 8(%{{.+}}), %xmm{{[0-9]+}}
; CHECK: cvtps2pd 16(%{{.+}}), %xmm{{[0-9]+}}
; CHECK: cvtps2pd 24(%{{.+}}), %xmm{{[0-9]+}}
; AVX: vcvtps2pd 16(%{{.+}}), %ymm{{[0-9]+}}
On Sandybridge split unaligned 256bit stores into two xmm-sized stores. llvm-svn: 172894
2013-01-19 16:38:41 +08:00
; AVX: vcvtps2pd (%{{.+}}), %ymm{{[0-9]+}}
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%0 = load <8 x float>, <8 x float>* %in
Enhance PR11334 fix to support extload from v2f32/v4f32 - Fix an remaining issue of PR11674 as well llvm-svn: 163528
2012-09-11 02:33:51 +08:00
%1 = fpext <8 x float> %0 to <8 x double>
store <8 x double> %1, <8 x double>* %out, align 1
ret void
}
[DAGCombiner] Add support for TRUNCATE + FP_EXTEND vector constant folding This patch adds supports for the vector constant folding of TRUNCATE and FP_EXTEND instructions and tidies up the SINT_TO_FP and UINT_TO_FP instructions to match. It also moves the vector constant folding for the FNEG and FABS instructions to use the DAG.getNode() functionality like the other unary instructions. Differential Revision: http://reviews.llvm.org/D8593 llvm-svn: 233224
2015-03-26 06:30:31 +08:00
define <2 x double> @fpext_fromconst() {
; CHECK-LABEL: fpext_fromconst:
; AVX-LABEL: fpext_fromconst:
entry:
; CHECK: movaps {{.*#+}} xmm0 = [1.000000e+00,-2.000000e+00]
; AVX: vmovaps {{.*#+}} xmm0 = [1.000000e+00,-2.000000e+00]
%0 = insertelement <2 x float> undef, float 1.0, i32 0
%1 = insertelement <2 x float> %0, float -2.0, i32 1
%2 = fpext <2 x float> %1 to <2 x double>
ret <2 x double> %2
}