forked from OSchip/llvm-project
106 lines
3.7 KiB
ArmAsm
106 lines
3.7 KiB
ArmAsm
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# The file testing Nop insertion with R_RISCV_ALIGN for relaxation.
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# Relaxation enabled:
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+relax < %s \
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# RUN: | llvm-objdump -d -riscv-no-aliases - \
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# RUN: | FileCheck -check-prefix=RELAX-INST %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+relax < %s \
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# RUN: | llvm-readobj -r | FileCheck -check-prefix=RELAX-RELOC %s
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# Relaxation disabled:
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=-relax < %s \
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# RUN: | llvm-objdump -d -riscv-no-aliases - \
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# RUN: | FileCheck -check-prefix=NORELAX-INST %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=-relax < %s \
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# RUN: | llvm-readobj -r | FileCheck -check-prefix=NORELAX-RELOC %s
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# Relaxation enabled with C extension:
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+c,+relax < %s \
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# RUN: | llvm-objdump -d -riscv-no-aliases - \
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# RUN: | FileCheck -check-prefix=C-EXT-RELAX-INST %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+c,+relax < %s \
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# RUN: | llvm-readobj -r | FileCheck -check-prefix=C-EXT-RELAX-RELOC %s
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# Relaxation disabled with C extension:
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+c,-relax < %s \
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# RUN: | llvm-objdump -d -riscv-no-aliases - \
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# RUN: | FileCheck -check-prefix=C-EXT-NORELAX-INST %s
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# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+c,-relax < %s \
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# RUN: | llvm-readobj -r | FileCheck -check-prefix=C-EXT-NORELAX-RELOC %s
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# We need to insert N-MinNopSize bytes NOPs and R_RISCV_ALIGN relocation
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# type for .align N directive when linker relaxation enabled.
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# Linker could satisfy alignment by removing NOPs after linker relaxation.
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# The first R_RISCV_ALIGN come from
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# MCELFStreamer::InitSections() EmitCodeAlignment(4).
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# C-EXT-RELAX-RELOC: R_RISCV_ALIGN - 0x2
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# C-EXT-RELAX-INST: c.nop
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test:
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.p2align 2
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# C-EXT-RELAX-RELOC: R_RISCV_ALIGN - 0x2
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# C-EXT-RELAX-INST: c.nop
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bne zero, a0, .LBB0_2
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mv a0, zero
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.p2align 3
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# RELAX-RELOC: R_RISCV_ALIGN - 0x4
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# RELAX-INST: addi zero, zero, 0
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# C-EXT-RELAX-RELOC: R_RISCV_ALIGN - 0x6
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# C-EXT-RELAX-INST: addi zero, zero, 0
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# C-EXT-RELAX-INST: c.nop
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# C-EXT-NORELAX-INST: addi zero, zero, 0
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add a0, a0, a1
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.align 4
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.LBB0_2:
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# RELAX-RELOC: R_RISCV_ALIGN - 0xC
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# RELAX-INST: addi zero, zero, 0
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# RELAX-INST: addi zero, zero, 0
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# RELAX-INST: addi zero, zero, 0
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# NORELAX-INST: addi zero, zero, 0
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# C-EXT-RELAX-RELOC: R_RISCV_ALIGN - 0xE
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# C-EXT-RELAX-INST: addi zero, zero, 0
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# C-EXT-RELAX-INST: addi zero, zero, 0
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# C-EXT-RELAX-INST: addi zero, zero, 0
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# C-EXT-RELAX-INST: c.nop
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# C-EXT-INST: addi zero, zero, 0
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# C-EXT-INST: c.nop
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add a0, a0, a1
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.p2align 3
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.constant_pool:
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.long 3126770193
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# RELAX-RELOC: R_RISCV_ALIGN - 0x4
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# RELAX-INST: addi zero, zero, 0
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# NORELAX-INST: addi zero, zero, 0
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# C-EXT-RELAX-RELOC: R_RISCV_ALIGN - 0x6
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# C-EXT-RELAX-INST: addi zero, zero, 0
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# C-EXT-RELAX-INST: c.nop
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# C-EXT-INST: addi zero, zero, 0
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# C-EXT-INST: c.nop
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add a0, a0, a1
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# Alignment directive with specific padding value 0x01.
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# We will not emit R_RISCV_ALIGN in this case.
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# The behavior is the same as GNU assembler.
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.p2align 4, 1
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# RELAX-RELOC-NOT: R_RISCV_ALIGN - 0xC
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# RELAX-INST: 01 01
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# RELAX-INST: 01 01
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# C-EXT-RELAX-RELOC-NOT: R_RISCV_ALIGN - 0xE
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# C-EXT-RELAX-INST: 01 01
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# C-EXT-INST: 01 01
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ret
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# NORELAX-RELOC-NOT: R_RISCV
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# C-EXT-NORELAX-RELOC-NOT: R_RISCV
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# We only need to insert R_RISCV_ALIGN for code section
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# when the linker relaxation enabled.
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.data
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.p2align 3
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# RELAX-RELOC-NOT: R_RISCV_ALIGN
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# C-EXT-RELAX-RELOC-NOT: R_RISCV_ALIGN
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data1:
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.word 7
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.p2align 4
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# RELAX-RELOC-NOT: R_RISCV_ALIGN
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# C-EXT-RELAX-RELOC-NOT: R_RISCV_ALIGN
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data2:
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.word 9
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