forked from OSchip/llvm-project
63 lines
2.1 KiB
LLVM
63 lines
2.1 KiB
LLVM
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; RUN: opt %loadPolly -polly-scops -analyze < %s | FileCheck %s
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; RUN: opt %loadPolly -polly-codegen-ppcg -S < %s
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; REQUIRES: pollyacc
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; CHECK: Stmt_bb5
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; CHECK: Domain :=
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; CHECK: { Stmt_bb5[i0, i1] : 0 <= i0 <= 1023 and 0 <= i1 <= 1023 };
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; CHECK: Schedule :=
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; CHECK: { Stmt_bb5[i0, i1] -> [i0, i1] };
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; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK: { Stmt_bb5[i0, i1] -> MemRef_A[i0, i1] };
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; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK: { Stmt_bb5[i0, i1] -> MemRef_A[i0, i1] };
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;
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; void double_parallel_loop(float A[][1024]) {
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; for (long i = 0; i < 1024; i++)
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; for (long j = 0; j < 1024; j++)
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; A[i][j] += i * j;
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; }
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;
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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define void @double_parallel_loop([1024 x float]* %A) {
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bb:
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br label %bb2
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bb2: ; preds = %bb13, %bb
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%i.0 = phi i64 [ 0, %bb ], [ %tmp14, %bb13 ]
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%exitcond1 = icmp ne i64 %i.0, 1024
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br i1 %exitcond1, label %bb3, label %bb15
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bb3: ; preds = %bb2
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br label %bb4
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bb4: ; preds = %bb10, %bb3
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%j.0 = phi i64 [ 0, %bb3 ], [ %tmp11, %bb10 ]
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%exitcond = icmp ne i64 %j.0, 1024
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br i1 %exitcond, label %bb5, label %bb12
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bb5: ; preds = %bb4
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%tmp = mul nuw nsw i64 %i.0, %j.0
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%tmp6 = sitofp i64 %tmp to float
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%tmp7 = getelementptr inbounds [1024 x float], [1024 x float]* %A, i64 %i.0, i64 %j.0
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%tmp8 = load float, float* %tmp7, align 4
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%tmp9 = fadd float %tmp8, %tmp6
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store float %tmp9, float* %tmp7, align 4
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br label %bb10
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bb10: ; preds = %bb5
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%tmp11 = add nuw nsw i64 %j.0, 1
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br label %bb4
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bb12: ; preds = %bb4
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br label %bb13
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bb13: ; preds = %bb12
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%tmp14 = add nuw nsw i64 %i.0, 1
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br label %bb2
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bb15: ; preds = %bb2
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ret void
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}
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