forked from OSchip/llvm-project
49 lines
1.6 KiB
C++
49 lines
1.6 KiB
C++
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//===-- RISCVSubtarget.cpp - RISCV Subtarget Information ------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the RISCV specific subclass of TargetSubtargetInfo.
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//
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//===----------------------------------------------------------------------===//
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#include "RISCVSubtarget.h"
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#include "RISCV.h"
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#include "RISCVFrameLowering.h"
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#include "llvm/Support/TargetRegistry.h"
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using namespace llvm;
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#define DEBUG_TYPE "riscv-subtarget"
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#define GET_SUBTARGETINFO_TARGET_DESC
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#define GET_SUBTARGETINFO_CTOR
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#include "RISCVGenSubtargetInfo.inc"
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void RISCVSubtarget::anchor() {}
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RISCVSubtarget &RISCVSubtarget::initializeSubtargetDependencies(StringRef CPU,
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StringRef FS,
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bool Is64Bit) {
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// Determine default and user-specified characteristics
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std::string CPUName = CPU;
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if (CPUName.empty())
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CPUName = Is64Bit ? "generic-rv64" : "generic-rv32";
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ParseSubtargetFeatures(CPUName, FS);
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if (Is64Bit) {
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XLenVT = MVT::i64;
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XLen = 64;
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}
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return *this;
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}
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RISCVSubtarget::RISCVSubtarget(const Triple &TT, const std::string &CPU,
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const std::string &FS, const TargetMachine &TM)
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: RISCVGenSubtargetInfo(TT, CPU, FS),
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FrameLowering(initializeSubtargetDependencies(CPU, FS, TT.isArch64Bit())),
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InstrInfo(), RegInfo(getHwMode()), TLInfo(TM, *this) {}
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