Replace subregister uses when processing tied operands
This was for some reason skipping operands that are subregisters
instead of keeping the same subregister index.
v_movreld_b32 expects src0 to be the subregister of the tied
super register use/def.
e.g.
v_movreld_b32 v0, v9, <imp-def, tied3> v[0:3], <imp-use, tied2> v[0:3]
was being replaced with
v[4:7] = copy v[0:3]
v_movreld_b32 v0, v9, <imp-def, tied3> v[4:7], <imp-use, tied2> v[4:7],
which really writes to v[0:3]
llvm-svn: 279804
2016-08-26 14:31:32 +08:00
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; RUN: llc -O0 -march=amdgcn -verify-machineinstrs < %s | FileCheck %s
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; FIXME: Merge into indirect-addressing-si.ll
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; Make sure that TwoAddressInstructions keeps src0 as subregister sub0
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; of the tied implicit use and def of the super register.
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; CHECK-LABEL: {{^}}insert_wo_offset:
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; CHECK: s_load_dword [[IN:s[0-9]+]]
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; CHECK: s_mov_b32 m0, [[IN]]
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; CHECK: v_movreld_b32_e32 v[[ELT0:[0-9]+]]
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; CHECK-NEXT: buffer_store_dwordx4 v{{\[}}[[ELT0]]:
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2017-03-22 05:39:51 +08:00
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define amdgpu_kernel void @insert_wo_offset(<4 x float> addrspace(1)* %out, i32 %in) {
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Replace subregister uses when processing tied operands
This was for some reason skipping operands that are subregisters
instead of keeping the same subregister index.
v_movreld_b32 expects src0 to be the subregister of the tied
super register use/def.
e.g.
v_movreld_b32 v0, v9, <imp-def, tied3> v[0:3], <imp-use, tied2> v[0:3]
was being replaced with
v[4:7] = copy v[0:3]
v_movreld_b32 v0, v9, <imp-def, tied3> v[4:7], <imp-use, tied2> v[4:7],
which really writes to v[0:3]
llvm-svn: 279804
2016-08-26 14:31:32 +08:00
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entry:
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%ins = insertelement <4 x float> <float 1.0, float 2.0, float 3.0, float 4.0>, float 5.0, i32 %in
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store <4 x float> %ins, <4 x float> addrspace(1)* %out
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ret void
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}
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