2018-06-22 00:49:33 +08:00
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//===- mlir-opt.cpp - MLIR Optimizer Driver -------------------------------===//
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//
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2020-01-26 11:58:30 +08:00
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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2019-12-24 01:35:36 +08:00
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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2018-06-22 00:49:33 +08:00
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//
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2019-12-24 01:35:36 +08:00
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//===----------------------------------------------------------------------===//
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2018-06-22 00:49:33 +08:00
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//
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2019-06-24 23:41:52 +08:00
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// Main entry function for mlir-opt for when built as standalone binary.
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2018-06-22 00:49:33 +08:00
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//
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//===----------------------------------------------------------------------===//
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2020-04-12 14:11:51 +08:00
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#include "mlir/IR/AsmState.h"
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2020-02-19 06:56:45 +08:00
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#include "mlir/IR/Dialect.h"
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#include "mlir/IR/MLIRContext.h"
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2020-04-12 14:11:51 +08:00
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#include "mlir/InitAllDialects.h"
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#include "mlir/InitAllPasses.h"
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2019-02-28 06:45:36 +08:00
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#include "mlir/Pass/Pass.h"
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2019-02-28 02:59:29 +08:00
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#include "mlir/Pass/PassManager.h"
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2019-01-11 23:22:57 +08:00
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#include "mlir/Support/FileUtilities.h"
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2019-06-24 23:41:52 +08:00
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#include "mlir/Support/MlirOptMain.h"
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2018-06-22 00:49:33 +08:00
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/InitLLVM.h"
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2018-07-08 10:12:22 +08:00
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#include "llvm/Support/SourceMgr.h"
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2018-06-22 06:22:42 +08:00
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#include "llvm/Support/ToolOutputFile.h"
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2018-08-31 08:35:15 +08:00
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2018-06-22 06:22:42 +08:00
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using namespace llvm;
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2019-06-24 23:41:52 +08:00
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using namespace mlir;
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2018-06-22 06:22:42 +08:00
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2020-02-12 17:03:40 +08:00
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namespace mlir {
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// Defined in the test directory, no public header.
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2020-08-14 00:53:07 +08:00
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void registerConvertCallOpPass();
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2020-02-12 17:03:40 +08:00
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void registerConvertToTargetEnvPass();
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void registerInliner();
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void registerMemRefBoundCheck();
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void registerPassManagerTestPass();
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void registerPatternsTestPass();
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2020-02-25 02:35:33 +08:00
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void registerPrintOpAvailabilityPass();
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[mlir][SideEffects] Define a set of interfaces and traits for defining side effects
This revision introduces the infrastructure for defining side-effects and attaching them to operations. This infrastructure allows for defining different types of side effects, that don't interact with each other, but use the same internal mechanisms. At the base of this is an interface that allows operations to specify the different effect instances that are exhibited by a specific operation instance. An effect instance is comprised of the following:
* Effect: The specific effect being applied.
For memory related effects this may be reading from memory, storing to memory, etc.
* Value: A specific value, either operand/result/region argument, the effect pertains to.
* Resource: This is a global entity that represents the domain within which the effect is being applied.
MLIR serves many different abstractions, which cover many different domains. Simple effects are may have very different context, for example writing to an in-memory buffer vs a database. This revision defines uses this infrastructure to define a set of initial MemoryEffects. The are effects that generally correspond to memory of some kind; Allocate, Free, Read, Write.
This set of memory effects will be used in follow revisions to generalize various parts of the compiler, and make others more powerful(e.g. DCE).
This infrastructure was originally proposed here:
https://groups.google.com/a/tensorflow.org/g/mlir/c/v2mNl4vFCUM
Differential Revision: https://reviews.llvm.org/D74439
2020-03-07 05:53:16 +08:00
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void registerSideEffectTestPasses();
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2020-02-12 17:03:40 +08:00
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void registerSimpleParametricTilingPass();
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void registerSymbolTestPasses();
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2020-02-15 05:41:01 +08:00
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void registerTestAffineDataCopyPass();
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2020-04-10 19:42:49 +08:00
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void registerTestAffineLoopUnswitchingPass();
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2020-07-29 20:58:09 +08:00
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void registerTestAllReduceLoweringPass();
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Providing buffer assignment for MLIR
We have provided a generic buffer assignment transformation ported from
TensorFlow. This generic transformation pass automatically analyzes the values
and their aliases (also in other blocks) and returns the valid positions for
Alloc and Dealloc operations. To find these positions, the algorithm uses the
block Dominator and Post-Dominator analyses. In our proposed algorithm, we have
considered aliasing, liveness, nested regions, branches, conditional branches,
critical edges, and independency to custom block terminators. This
implementation doesn't support block loops. However, we have considered this in
our design. For this purpose, it is only required to have a loop analysis to
insert Alloc and Dealloc operations outside of these loops in some special
cases.
Differential Revision: https://reviews.llvm.org/D78484
2020-04-20 18:41:14 +08:00
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void registerTestBufferPlacementPreparationPass();
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2020-02-12 17:03:40 +08:00
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void registerTestCallGraphPass();
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void registerTestConstantFold();
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2020-03-22 18:13:40 +08:00
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void registerTestConvertGPUKernelToCubinPass();
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2020-05-23 05:25:00 +08:00
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void registerTestConvertGPUKernelToHsacoPass();
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2020-03-03 17:33:16 +08:00
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void registerTestDominancePass();
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2020-06-16 01:26:32 +08:00
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void registerTestExpandTanhPass();
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2020-02-12 17:03:40 +08:00
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void registerTestFunc();
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void registerTestGpuMemoryPromotionPass();
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2020-07-29 20:58:09 +08:00
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void registerTestGpuParallelLoopMappingPass();
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2020-07-01 06:42:52 +08:00
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void registerTestInterfaces();
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2020-06-05 06:55:26 +08:00
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void registerTestLinalgHoisting();
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2020-02-12 17:03:40 +08:00
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void registerTestLinalgTransforms();
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void registerTestLivenessPass();
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void registerTestLoopFusion();
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void registerTestLoopMappingPass();
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2020-07-29 20:58:09 +08:00
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void registerTestLoopPermutationPass();
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[MLIR][LoopOps] Adds the loop unroll transformation for loop::ForOp.
Summary:
Adds the loop unroll transformation for loop::ForOp.
Adds support for promoting the body of single-iteration loop::ForOps into its containing block.
Adds check tests for loop::ForOps with dynamic and static lower/upper bounds and step.
Care was taken to share code (where possible) with the AffineForOp unroll transformation to ease maintenance and potential future transition to a LoopLike construct on which loop transformations for different loop types can implemented.
Reviewers: ftynse, nicolasvasilache
Reviewed By: ftynse
Subscribers: bondhugula, mgorny, zzheng, mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, Joonsoo, grosul1, frgossen, Kayjukh, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D79184
2020-05-06 01:29:09 +08:00
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void registerTestLoopUnrollingPass();
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2020-02-12 17:03:40 +08:00
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void registerTestMatchers();
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void registerTestMemRefDependenceCheck();
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void registerTestMemRefStrideCalculation();
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void registerTestOpaqueLoc();
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2020-06-03 00:12:57 +08:00
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void registerTestPreparationPassWithAllowedMemrefResults();
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2020-07-22 19:03:24 +08:00
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void registerTestRecursiveTypesPass();
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2020-07-11 08:46:55 +08:00
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void registerTestReducer();
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2020-07-29 02:47:30 +08:00
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void registerTestSpirvEntryPointABIPass();
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2020-05-29 18:42:35 +08:00
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void registerTestSCFUtilsPass();
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2020-02-12 17:03:40 +08:00
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void registerTestVectorConversions();
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void registerVectorizerTestPass();
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} // namespace mlir
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2020-05-19 00:44:26 +08:00
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#ifdef MLIR_INCLUDE_TESTS
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2020-02-12 17:03:40 +08:00
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void registerTestPasses() {
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2020-08-14 00:53:07 +08:00
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registerConvertCallOpPass();
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2020-02-12 17:03:40 +08:00
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registerConvertToTargetEnvPass();
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registerInliner();
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registerMemRefBoundCheck();
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registerPassManagerTestPass();
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registerPatternsTestPass();
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2020-02-25 02:35:33 +08:00
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registerPrintOpAvailabilityPass();
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[mlir][SideEffects] Define a set of interfaces and traits for defining side effects
This revision introduces the infrastructure for defining side-effects and attaching them to operations. This infrastructure allows for defining different types of side effects, that don't interact with each other, but use the same internal mechanisms. At the base of this is an interface that allows operations to specify the different effect instances that are exhibited by a specific operation instance. An effect instance is comprised of the following:
* Effect: The specific effect being applied.
For memory related effects this may be reading from memory, storing to memory, etc.
* Value: A specific value, either operand/result/region argument, the effect pertains to.
* Resource: This is a global entity that represents the domain within which the effect is being applied.
MLIR serves many different abstractions, which cover many different domains. Simple effects are may have very different context, for example writing to an in-memory buffer vs a database. This revision defines uses this infrastructure to define a set of initial MemoryEffects. The are effects that generally correspond to memory of some kind; Allocate, Free, Read, Write.
This set of memory effects will be used in follow revisions to generalize various parts of the compiler, and make others more powerful(e.g. DCE).
This infrastructure was originally proposed here:
https://groups.google.com/a/tensorflow.org/g/mlir/c/v2mNl4vFCUM
Differential Revision: https://reviews.llvm.org/D74439
2020-03-07 05:53:16 +08:00
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registerSideEffectTestPasses();
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2020-02-12 17:03:40 +08:00
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registerSimpleParametricTilingPass();
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registerSymbolTestPasses();
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2020-02-15 05:41:01 +08:00
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registerTestAffineDataCopyPass();
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2020-02-12 17:03:40 +08:00
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registerTestAllReduceLoweringPass();
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2020-04-10 19:42:49 +08:00
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registerTestAffineLoopUnswitchingPass();
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2020-03-29 02:49:09 +08:00
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registerTestLoopPermutationPass();
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2020-02-12 17:03:40 +08:00
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registerTestCallGraphPass();
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registerTestConstantFold();
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2020-03-22 18:13:40 +08:00
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#if MLIR_CUDA_CONVERSIONS_ENABLED
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registerTestConvertGPUKernelToCubinPass();
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2020-05-23 05:25:00 +08:00
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#endif
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#if MLIR_ROCM_CONVERSIONS_ENABLED
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registerTestConvertGPUKernelToHsacoPass();
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2020-03-22 18:13:40 +08:00
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#endif
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Providing buffer assignment for MLIR
We have provided a generic buffer assignment transformation ported from
TensorFlow. This generic transformation pass automatically analyzes the values
and their aliases (also in other blocks) and returns the valid positions for
Alloc and Dealloc operations. To find these positions, the algorithm uses the
block Dominator and Post-Dominator analyses. In our proposed algorithm, we have
considered aliasing, liveness, nested regions, branches, conditional branches,
critical edges, and independency to custom block terminators. This
implementation doesn't support block loops. However, we have considered this in
our design. For this purpose, it is only required to have a loop analysis to
insert Alloc and Dealloc operations outside of these loops in some special
cases.
Differential Revision: https://reviews.llvm.org/D78484
2020-04-20 18:41:14 +08:00
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registerTestBufferPlacementPreparationPass();
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2020-03-03 17:33:16 +08:00
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registerTestDominancePass();
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2020-02-12 17:03:40 +08:00
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registerTestFunc();
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2020-06-16 01:26:32 +08:00
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registerTestExpandTanhPass();
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2020-02-12 17:03:40 +08:00
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registerTestGpuMemoryPromotionPass();
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2020-07-01 06:42:52 +08:00
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registerTestInterfaces();
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2020-06-05 06:55:26 +08:00
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registerTestLinalgHoisting();
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2020-02-12 17:03:40 +08:00
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registerTestLinalgTransforms();
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registerTestLivenessPass();
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registerTestLoopFusion();
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registerTestLoopMappingPass();
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[MLIR][LoopOps] Adds the loop unroll transformation for loop::ForOp.
Summary:
Adds the loop unroll transformation for loop::ForOp.
Adds support for promoting the body of single-iteration loop::ForOps into its containing block.
Adds check tests for loop::ForOps with dynamic and static lower/upper bounds and step.
Care was taken to share code (where possible) with the AffineForOp unroll transformation to ease maintenance and potential future transition to a LoopLike construct on which loop transformations for different loop types can implemented.
Reviewers: ftynse, nicolasvasilache
Reviewed By: ftynse
Subscribers: bondhugula, mgorny, zzheng, mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, Joonsoo, grosul1, frgossen, Kayjukh, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D79184
2020-05-06 01:29:09 +08:00
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registerTestLoopUnrollingPass();
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2020-02-12 17:03:40 +08:00
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registerTestMatchers();
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registerTestMemRefDependenceCheck();
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registerTestMemRefStrideCalculation();
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registerTestOpaqueLoc();
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2020-06-03 00:12:57 +08:00
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registerTestPreparationPassWithAllowedMemrefResults();
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2020-07-22 19:03:24 +08:00
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registerTestRecursiveTypesPass();
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2020-07-11 08:46:55 +08:00
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registerTestReducer();
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2020-02-21 23:18:22 +08:00
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registerTestGpuParallelLoopMappingPass();
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2020-07-29 02:47:30 +08:00
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registerTestSpirvEntryPointABIPass();
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2020-05-29 18:42:35 +08:00
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registerTestSCFUtilsPass();
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2020-02-12 17:03:40 +08:00
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registerTestVectorConversions();
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registerVectorizerTestPass();
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}
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2020-05-19 00:44:26 +08:00
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#endif
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2020-02-12 17:03:40 +08:00
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2018-06-25 00:10:36 +08:00
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int main(int argc, char **argv) {
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2020-02-12 17:03:40 +08:00
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registerAllDialects();
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registerAllPasses();
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2020-05-19 00:44:26 +08:00
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#ifdef MLIR_INCLUDE_TESTS
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2020-02-12 17:03:40 +08:00
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registerTestPasses();
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2020-05-19 00:44:26 +08:00
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#endif
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2020-08-19 08:32:30 +08:00
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return failed(MlirOptMain(argc, argv, "MLIR modular optimizer driver"));
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2018-06-22 00:49:33 +08:00
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}
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