llvm-project/llvm/test/CodeGen/AArch64/arm64-fp.ll

; RUN: llc < %s -march=arm64 | FileCheck %s

define float @t1(i1 %a, float %b, float %c) nounwind {
; CHECK: t1
; CHECK: fcsel	s0, s0, s1, ne
  %sel = select i1 %a, float %b, float %c
  ret float %sel
}
ARM64: initial backend import This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. llvm-svn: 205090 2014-03-29 18:18:08 +08:00			`; RUN: llc < %s -march=arm64 \| FileCheck %s`

			`define float @t1(i1 %a, float %b, float %c) nounwind {`
			`; CHECK: t1`
			`; CHECK: fcsel s0, s0, s1, ne`
			`%sel = select i1 %a, float %b, float %c`
			`ret float %sel`
			`}`