2013-03-15 03:08:03 +08:00
|
|
|
; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s
|
|
|
|
; Check that the mis-aligned load doesn't cause compiler to assert.
|
|
|
|
|
|
|
|
declare i32 @_hi(i64) #1
|
|
|
|
@temp1 = common global i32 0, align 4
|
|
|
|
|
|
|
|
define i32 @CSDRSEARCH_executeSearchManager() #0 {
|
|
|
|
entry:
|
|
|
|
%temp = alloca i32, align 4
|
2015-02-28 05:17:42 +08:00
|
|
|
%0 = load i32, i32* @temp1, align 4
|
2013-03-15 03:08:03 +08:00
|
|
|
store i32 %0, i32* %temp, align 4
|
|
|
|
%1 = bitcast i32* %temp to i64*
|
2015-02-28 05:17:42 +08:00
|
|
|
%2 = load i64, i64* %1, align 8
|
2013-03-15 03:08:03 +08:00
|
|
|
%call = call i32 @_hi(i64 %2)
|
|
|
|
ret i32 %call
|
|
|
|
}
|