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llvm-project/llvm/test/CodeGen/Hexagon/cmp_pred2.ll

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Hexagon: Remove assembler mapped instruction definitions. llvm-svn: 180133
2013-04-24 03:15:55 +08:00
; RUN: llc -march=hexagon -mcpu=hexagonv5 < %s | FileCheck %s
; Make sure that the assembler mapped compare instructions are correctly generated.
@c = common global i32 0, align 4
define i32 @test1(i32 %a, i32 %b) nounwind {
; CHECK-NOT: cmp.ge
; CHECK: cmp.gt
entry:
%cmp = icmp slt i32 %a, 100
br i1 %cmp, label %if.then, label %entry.if.end_crit_edge
entry.if.end_crit_edge:
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%.pre = load i32, i32* @c, align 4
Hexagon: Remove assembler mapped instruction definitions. llvm-svn: 180133
2013-04-24 03:15:55 +08:00
br label %if.end
if.then:
%sub = add nsw i32 %a, -10
store i32 %sub, i32* @c, align 4
br label %if.end
if.end:
%0 = phi i32 [ %.pre, %entry.if.end_crit_edge ], [ %sub, %if.then ]
ret i32 %0
}
define i32 @test2(i32 %a, i32 %b) nounwind {
; CHECK-NOT: cmp.lt
; CHECK: cmp.gt
entry:
%cmp = icmp sge i32 %a, %b
br i1 %cmp, label %entry.if.end_crit_edge, label %if.then
entry.if.end_crit_edge:
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%.pre = load i32, i32* @c, align 4
Hexagon: Remove assembler mapped instruction definitions. llvm-svn: 180133
2013-04-24 03:15:55 +08:00
br label %if.end
if.then:
%sub = add nsw i32 %a, -10
store i32 %sub, i32* @c, align 4
br label %if.end
if.end:
%0 = phi i32 [ %.pre, %entry.if.end_crit_edge ], [ %sub, %if.then ]
ret i32 %0
}
define i32 @test4(i32 %a, i32 %b) nounwind {
; CHECK-NOT: cmp.ltu
; CHECK: cmp.gtu
entry:
%cmp = icmp uge i32 %a, %b
br i1 %cmp, label %entry.if.end_crit_edge, label %if.then
entry.if.end_crit_edge:
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%.pre = load i32, i32* @c, align 4
Hexagon: Remove assembler mapped instruction definitions. llvm-svn: 180133
2013-04-24 03:15:55 +08:00
br label %if.end
if.then:
%sub = add i32 %a, -10
store i32 %sub, i32* @c, align 4
br label %if.end
if.end:
%0 = phi i32 [ %.pre, %entry.if.end_crit_edge ], [ %sub, %if.then ]
ret i32 %0
}
define i32 @test5(i32 %a, i32 %b) nounwind {
; CHECK: cmp.gtu
entry:
%cmp = icmp uge i32 %a, 29999
br i1 %cmp, label %if.then, label %entry.if.end_crit_edge
entry.if.end_crit_edge:
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%.pre = load i32, i32* @c, align 4
Hexagon: Remove assembler mapped instruction definitions. llvm-svn: 180133
2013-04-24 03:15:55 +08:00
br label %if.end
if.then:
%sub = add i32 %a, -10
store i32 %sub, i32* @c, align 4
br label %if.end
if.end:
%0 = phi i32 [ %.pre, %entry.if.end_crit_edge ], [ %sub, %if.then ]
ret i32 %0
}