llvm-project/llvm/test/CodeGen/Mips/frame-address.ll

; RUN: llc -march=mipsel < %s | FileCheck %s

declare i8* @llvm.frameaddress(i32) nounwind readnone

define i8* @f() nounwind uwtable {
entry:
  %0 = call i8* @llvm.frameaddress(i32 0)
  ret i8* %0

; CHECK: .cfi_startproc
; CHECK: .cfi_def_cfa_offset 8
; CHECK: .cfi_offset 30, -4
; CHECK:   move    $fp, $sp
; CHECK: .cfi_def_cfa_register 30
; CHECK:   move    $2, $fp
; CHECK: .cfi_endproc
}
Drop support for Mips1 and Mips2. llvm-svn: 139405 2011-09-10 04:45:50 +08:00			`; RUN: llc -march=mipsel < %s \| FileCheck %s`
Test case for r132444. llvm-svn: 132445 2011-06-02 08:25:53 +08:00
			`declare i8* @llvm.frameaddress(i32) nounwind readnone`

Add more addFrameMove test coverage. llvm-svn: 182011 2013-05-16 22:51:26 +08:00			`define i8* @f() nounwind uwtable {`
Test case for r132444. llvm-svn: 132445 2011-06-02 08:25:53 +08:00			`entry:`
			`%0 = call i8* @llvm.frameaddress(i32 0)`
			`ret i8* %0`

Add more addFrameMove test coverage. llvm-svn: 182011 2013-05-16 22:51:26 +08:00			`; CHECK: .cfi_startproc`
			`; CHECK: .cfi_def_cfa_offset 8`
			`; CHECK: .cfi_offset 30, -4`
This patch that sets the EmitAlias flag in td files and enables the instruction printer to print aliased instructions. Due to usage of RegisterOperands a change in common code (utils/TableGen/AsmWriterEmitter.cpp) is required to get the correct register value if it is a RegisterOperand. Contributer: Vladimir Medic llvm-svn: 174358 2013-02-05 16:32:10 +08:00			`; CHECK: move $fp, $sp`
Add more addFrameMove test coverage. llvm-svn: 182011 2013-05-16 22:51:26 +08:00			`; CHECK: .cfi_def_cfa_register 30`
[mips] Print move instructions. "move $4, $5" is printed instead of "or $4, $5, $zero". llvm-svn: 176455 2013-03-05 06:25:01 +08:00			`; CHECK: move $2, $fp`
Add more addFrameMove test coverage. llvm-svn: 182011 2013-05-16 22:51:26 +08:00			`; CHECK: .cfi_endproc`
Test case for r132444. llvm-svn: 132445 2011-06-02 08:25:53 +08:00			`}`