2017-06-21 23:40:43 +08:00
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//===-- llvm/CodeGen/SelectionDAGAddressAnalysis.cpp ------- DAG Address
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//Analysis ---*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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#include "llvm/CodeGen/SelectionDAGAddressAnalysis.h"
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#include "llvm/CodeGen/ISDOpcodes.h"
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2017-06-29 23:48:11 +08:00
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#include "llvm/CodeGen/MachineFrameInfo.h"
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2017-06-21 23:40:43 +08:00
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#include "llvm/CodeGen/SelectionDAG.h"
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#include "llvm/CodeGen/SelectionDAGNodes.h"
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namespace llvm {
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bool BaseIndexOffset::equalBaseIndex(BaseIndexOffset &Other,
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const SelectionDAG &DAG, int64_t &Off) {
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2017-06-29 23:48:11 +08:00
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// Initial Offset difference.
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2017-06-21 23:40:43 +08:00
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Off = Other.Offset - Offset;
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2017-06-29 23:48:11 +08:00
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if ((Other.Index == Index) && (Other.IsIndexSignExt == IsIndexSignExt)) {
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// Trivial match.
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if (Other.Base == Base)
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return true;
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// Match GlobalAddresses
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if (auto *A = dyn_cast<GlobalAddressSDNode>(Base))
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if (auto *B = dyn_cast<GlobalAddressSDNode>(Other.Base))
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if (A->getGlobal() == B->getGlobal()) {
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Off += B->getOffset() - A->getOffset();
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return true;
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}
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2017-06-29 23:48:11 +08:00
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const MachineFrameInfo &MFI = DAG.getMachineFunction().getFrameInfo();
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2017-06-21 23:40:43 +08:00
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2017-06-29 23:48:11 +08:00
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// Match non-equal FrameIndexes - a FrameIndex stemming from an
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// alloca will not have it's ObjectOffset set until post-DAG and
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// as such we must assume the two framesIndices are incomparable.
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if (auto *A = dyn_cast<FrameIndexSDNode>(Base))
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if (auto *B = dyn_cast<FrameIndexSDNode>(Other.Base))
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if (!MFI.getObjectAllocation(A->getIndex()) &&
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!MFI.getObjectAllocation(B->getIndex())) {
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Off += MFI.getObjectOffset(B->getIndex()) -
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MFI.getObjectOffset(A->getIndex());
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return true;
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}
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}
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2017-06-21 23:40:43 +08:00
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return false;
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}
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/// Parses tree in Ptr for base, index, offset addresses.
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BaseIndexOffset BaseIndexOffset::match(SDValue Ptr, const SelectionDAG &DAG) {
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2017-06-21 23:40:43 +08:00
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// (((B + I*M) + c)) + c ...
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SDValue Base = Ptr;
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SDValue Index = SDValue();
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int64_t Offset = 0;
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bool IsIndexSignExt = false;
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2017-06-30 20:56:02 +08:00
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// Consume constant adds
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while (Base->getOpcode() == ISD::ADD &&
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isa<ConstantSDNode>(Base->getOperand(1))) {
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int64_t POffset = cast<ConstantSDNode>(Base->getOperand(1))->getSExtValue();
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Offset += POffset;
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Base = Base->getOperand(0);
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2017-06-21 23:40:43 +08:00
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}
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if (Base->getOpcode() == ISD::ADD) {
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// TODO: The following code appears to be needless as it just
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// bails on some Ptrs early, reducing the cases where we
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// find equivalence. We should be able to remove this.
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// Inside a loop the current BASE pointer is calculated using an ADD and a
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// MUL instruction. In this case Base is the actual BASE pointer.
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// (i64 add (i64 %array_ptr)
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// (i64 mul (i64 %induction_var)
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// (i64 %element_size)))
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if (Base->getOperand(1)->getOpcode() == ISD::MUL)
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return BaseIndexOffset(Base, Index, Offset, IsIndexSignExt);
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// Look at Base + Index + Offset cases.
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Index = Base->getOperand(1);
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SDValue PotentialBase = Base->getOperand(0);
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// Skip signextends.
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if (Index->getOpcode() == ISD::SIGN_EXTEND) {
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Index = Index->getOperand(0);
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IsIndexSignExt = true;
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}
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// Check if Index Offset pattern
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if (Index->getOpcode() != ISD::ADD ||
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!isa<ConstantSDNode>(Index->getOperand(1)))
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return BaseIndexOffset(PotentialBase, Index, Offset, IsIndexSignExt);
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Offset += cast<ConstantSDNode>(Index->getOperand(1))->getSExtValue();
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Index = Index->getOperand(0);
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if (Index->getOpcode() == ISD::SIGN_EXTEND) {
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Index = Index->getOperand(0);
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IsIndexSignExt = true;
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} else
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IsIndexSignExt = false;
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Base = PotentialBase;
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}
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return BaseIndexOffset(Base, Index, Offset, IsIndexSignExt);
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}
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} // end namespace llvm
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