llvm-project/llvm/test/CodeGen/X86/GlobalISel/X86-regbankselect.mir

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# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=regbankselect %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=FAST
# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -regbankselect-greedy -run-pass=regbankselect %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=GREEDY
--- |
; ModuleID = 'tmp.ll'
source_filename = "tmp.ll"
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64--linux-gnu"
define i8 @test_add_i8(i8 %arg1, i8 %arg2) {
%ret = add i8 %arg1, %arg2
ret i8 %ret
}
define i16 @test_add_i16(i16 %arg1, i16 %arg2) {
%ret = add i16 %arg1, %arg2
ret i16 %ret
}
define i32 @test_add_i32(i32 %arg1, i32 %arg2) {
%ret = add i32 %arg1, %arg2
ret i32 %ret
}
define i64 @test_add_i64(i64 %arg1, i64 %arg2) {
%ret = add i64 %arg1, %arg2
ret i64 %ret
}
define float @test_add_float(float %arg1, float %arg2) {
%ret = fadd float %arg1, %arg2
ret float %ret
}
define double @test_add_double(double %arg1, double %arg2) {
%ret = fadd double %arg1, %arg2
ret double %ret
}
define <4 x i32> @test_add_v4i32(<4 x i32> %arg1, <4 x i32> %arg2) {
%ret = add <4 x i32> %arg1, %arg2
ret <4 x i32> %ret
}
define <4 x float> @test_add_v4f32(<4 x float> %arg1, <4 x float> %arg2) {
%ret = fadd <4 x float> %arg1, %arg2
ret <4 x float> %ret
}
define i8 @test_load_i8(i8* %p1) {
%r = load i8, i8* %p1
ret i8 %r
}
define i16 @test_load_i16(i16* %p1) {
%r = load i16, i16* %p1
ret i16 %r
}
define i32 @test_load_i32(i32* %p1) {
%r = load i32, i32* %p1
ret i32 %r
}
define i64 @test_load_i64(i64* %p1) {
%r = load i64, i64* %p1
ret i64 %r
}
define float @test_load_float(float* %p1) {
%r = load float, float* %p1
ret float %r
}
define double @test_load_double(double* %p1) {
%r = load double, double* %p1
ret double %r
}
define <4 x i32> @test_load_v4i32(<4 x i32>* %p1) {
%r = load <4 x i32>, <4 x i32>* %p1, align 16
ret <4 x i32> %r
}
define i32* @test_store_i32(i32 %val, i32* %p1) {
store i32 %val, i32* %p1
ret i32* %p1
}
define i64* @test_store_i64(i64 %val, i64* %p1) {
store i64 %val, i64* %p1
ret i64* %p1
}
define float* @test_store_float(float %val, float* %p1) {
store float %val, float* %p1
ret float* %p1
}
define double* @test_store_double(double %val, double* %p1) {
store double %val, double* %p1
ret double* %p1
}
define void @constInt_check() {
ret void
}
define void @trunc_check() {
ret void
}
...
---
name: test_add_i8
alignment: 4
legalized: true
regBankSelected: false
selected: false
tracksRegLiveness: true
# CHECK-LABEL: name: test_add_i8
# CHECK: registers:
# CHECK: - { id: 0, class: gpr }
# CHECK: - { id: 1, class: gpr }
# CHECK: - { id: 2, class: gpr }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.1 (%ir-block.0):
liveins: %edi, %esi
%0(s8) = COPY %edi
%1(s8) = COPY %esi
%2(s8) = G_ADD %0, %1
%al = COPY %2(s8)
RET 0, implicit %al
...
---
name: test_add_i16
alignment: 4
legalized: true
regBankSelected: false
selected: false
tracksRegLiveness: true
# CHECK-LABEL: name: test_add_i16
# CHECK: registers:
# CHECK: - { id: 0, class: gpr }
# CHECK: - { id: 1, class: gpr }
# CHECK: - { id: 2, class: gpr }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.1 (%ir-block.0):
liveins: %edi, %esi
%0(s16) = COPY %edi
%1(s16) = COPY %esi
%2(s16) = G_ADD %0, %1
%ax = COPY %2(s16)
RET 0, implicit %ax
...
---
name: test_add_i32
alignment: 4
legalized: true
regBankSelected: false
selected: false
tracksRegLiveness: true
# CHECK-LABEL: name: test_add_i32
# CHECK: registers:
# CHECK: - { id: 0, class: gpr }
# CHECK: - { id: 1, class: gpr }
# CHECK: - { id: 2, class: gpr }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.1 (%ir-block.0):
liveins: %edi, %esi
%0(s32) = COPY %edi
%1(s32) = COPY %esi
%2(s32) = G_ADD %0, %1
%eax = COPY %2(s32)
RET 0, implicit %eax
...
---
name: test_add_i64
alignment: 4
legalized: true
regBankSelected: false
selected: false
tracksRegLiveness: true
# CHECK-LABEL: name: test_add_i64
# CHECK: registers:
# CHECK: - { id: 0, class: gpr }
# CHECK: - { id: 1, class: gpr }
# CHECK: - { id: 2, class: gpr }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.1 (%ir-block.0):
liveins: %rdi, %rsi
%0(s64) = COPY %rdi
%1(s64) = COPY %rsi
%2(s64) = G_ADD %0, %1
%rax = COPY %2(s64)
RET 0, implicit %rax
...
---
name: test_add_float
alignment: 4
legalized: true
regBankSelected: false
selected: false
tracksRegLiveness: true
# CHECK-LABEL: name: test_add_float
# CHECK: registers:
# CHECK: - { id: 0, class: vecr }
# CHECK: - { id: 1, class: vecr }
# CHECK: - { id: 2, class: vecr }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.1 (%ir-block.0):
liveins: %xmm0, %xmm1
%0(s32) = COPY %xmm0
%1(s32) = COPY %xmm1
%2(s32) = G_FADD %0, %1
%xmm0 = COPY %2(s32)
RET 0, implicit %xmm0
...
---
name: test_add_double
alignment: 4
legalized: true
regBankSelected: false
selected: false
tracksRegLiveness: true
# CHECK-LABEL: name: test_add_double
# CHECK: registers:
# CHECK: - { id: 0, class: vecr }
# CHECK: - { id: 1, class: vecr }
# CHECK: - { id: 2, class: vecr }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.1 (%ir-block.0):
liveins: %xmm0, %xmm1
%0(s64) = COPY %xmm0
%1(s64) = COPY %xmm1
%2(s64) = G_FADD %0, %1
%xmm0 = COPY %2(s64)
RET 0, implicit %xmm0
...
---
name: test_add_v4i32
alignment: 4
legalized: true
regBankSelected: false
selected: false
tracksRegLiveness: true
# CHECK-LABEL: name: test_add_v4i32
# CHECK: registers:
# CHECK: - { id: 0, class: vecr }
# CHECK: - { id: 1, class: vecr }
# CHECK: - { id: 2, class: vecr }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.1 (%ir-block.0):
liveins: %xmm0, %xmm1
%0(<4 x s32>) = COPY %xmm0
%1(<4 x s32>) = COPY %xmm1
%2(<4 x s32>) = G_ADD %0, %1
%xmm0 = COPY %2(<4 x s32>)
RET 0, implicit %xmm0
...
---
name: test_add_v4f32
alignment: 4
legalized: true
regBankSelected: false
selected: false
tracksRegLiveness: true
# CHECK-LABEL: name: test_add_v4f32
# CHECK: registers:
# CHECK: - { id: 0, class: vecr }
# CHECK: - { id: 1, class: vecr }
# CHECK: - { id: 2, class: vecr }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.1 (%ir-block.0):
liveins: %xmm0, %xmm1
%0(<4 x s32>) = COPY %xmm0
%1(<4 x s32>) = COPY %xmm1
%2(<4 x s32>) = G_FADD %0, %1
%xmm0 = COPY %2(<4 x s32>)
RET 0, implicit %xmm0
...
---
name: test_load_i8
alignment: 4
legalized: true
regBankSelected: false
selected: false
# CHECK-LABEL: name: test_load_i8
# CHECK: registers:
# CHECK: - { id: 0, class: gpr }
# CHECK: - { id: 1, class: gpr }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
body: |
bb.1 (%ir-block.0):
liveins: %rdi
%0(p0) = COPY %rdi
%1(s8) = G_LOAD %0(p0) :: (load 1 from %ir.p1)
%al = COPY %1(s8)
RET 0, implicit %al
...
---
name: test_load_i16
alignment: 4
legalized: true
regBankSelected: false
selected: false
# CHECK-LABEL: name: test_load_i16
# CHECK: registers:
# CHECK: - { id: 0, class: gpr }
# CHECK: - { id: 1, class: gpr }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
body: |
bb.1 (%ir-block.0):
liveins: %rdi
%0(p0) = COPY %rdi
%1(s16) = G_LOAD %0(p0) :: (load 2 from %ir.p1)
%ax = COPY %1(s16)
RET 0, implicit %ax
...
---
name: test_load_i32
alignment: 4
legalized: true
regBankSelected: false
selected: false
# CHECK-LABEL: name: test_load_i32
# CHECK: registers:
# CHECK: - { id: 0, class: gpr }
# CHECK: - { id: 1, class: gpr }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
body: |
bb.1 (%ir-block.0):
liveins: %rdi
%0(p0) = COPY %rdi
%1(s32) = G_LOAD %0(p0) :: (load 4 from %ir.p1)
%eax = COPY %1(s32)
RET 0, implicit %eax
...
---
name: test_load_i64
alignment: 4
exposesReturnsTwice: false
legalized: true
regBankSelected: false
selected: false
# CHECK-LABEL: name: test_load_i64
# CHECK: registers:
# CHECK: - { id: 0, class: gpr }
# CHECK: - { id: 1, class: gpr }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
body: |
bb.1 (%ir-block.0):
liveins: %rdi
%0(p0) = COPY %rdi
%1(s64) = G_LOAD %0(p0) :: (load 8 from %ir.p1)
%rax = COPY %1(s64)
RET 0, implicit %rax
...
---
name: test_load_float
alignment: 4
legalized: true
regBankSelected: false
selected: false
# CHECK-LABEL: name: test_load_float
# CHECK: registers:
# CHECK: - { id: 0, class: gpr }
# CHECK: - { id: 1, class: gpr }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
body: |
bb.1 (%ir-block.0):
liveins: %rdi
%0(p0) = COPY %rdi
%1(s32) = G_LOAD %0(p0) :: (load 4 from %ir.p1)
%xmm0 = COPY %1(s32)
RET 0, implicit %xmm0
...
---
name: test_load_double
alignment: 4
legalized: true
regBankSelected: false
selected: false
# CHECK-LABEL: name: test_load_double
# CHECK: registers:
# CHECK: - { id: 0, class: gpr }
# CHECK: - { id: 1, class: gpr }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
body: |
bb.1 (%ir-block.0):
liveins: %rdi
%0(p0) = COPY %rdi
%1(s64) = G_LOAD %0(p0) :: (load 8 from %ir.p1)
%xmm0 = COPY %1(s64)
RET 0, implicit %xmm0
...
---
name: test_load_v4i32
alignment: 4
legalized: true
regBankSelected: false
selected: false
# CHECK-LABEL: name: test_load_v4i32
# CHECK: registers:
# CHECK: - { id: 0, class: gpr }
# CHECK: - { id: 1, class: vecr }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
body: |
bb.1 (%ir-block.0):
liveins: %rdi
%0(p0) = COPY %rdi
%1(<4 x s32>) = G_LOAD %0(p0) :: (load 16 from %ir.p1, align 1)
%xmm0 = COPY %1(<4 x s32>)
RET 0, implicit %xmm0
...
---
name: test_store_i32
alignment: 4
legalized: true
regBankSelected: false
selected: false
# CHECK-LABEL: name: test_store_i32
# CHECK: registers:
# CHECK: - { id: 0, class: gpr }
# CHECK: - { id: 1, class: gpr }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
body: |
bb.1 (%ir-block.0):
liveins: %edi, %rsi
%0(s32) = COPY %edi
%1(p0) = COPY %rsi
G_STORE %0(s32), %1(p0) :: (store 4 into %ir.p1)
%rax = COPY %1(p0)
RET 0, implicit %rax
...
---
name: test_store_i64
alignment: 4
legalized: true
regBankSelected: false
selected: false
# CHECK-LABEL: name: test_store_i64
# CHECK: registers:
# CHECK: - { id: 0, class: gpr }
# CHECK: - { id: 1, class: gpr }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
body: |
bb.1 (%ir-block.0):
liveins: %rdi, %rsi
%0(s64) = COPY %rdi
%1(p0) = COPY %rsi
G_STORE %0(s64), %1(p0) :: (store 8 into %ir.p1)
%rax = COPY %1(p0)
RET 0, implicit %rax
...
---
name: test_store_float
alignment: 4
legalized: true
regBankSelected: false
selected: false
# CHECK-LABEL: name: test_store_float
# CHECK: registers:
# FAST-NEXT: - { id: 0, class: vecr }
# FAST-NEXT: - { id: 1, class: gpr }
# FAST-NEXT: - { id: 2, class: gpr }
# GREEDY-NEXT: - { id: 0, class: vecr }
# GREEDY-NEXT: - { id: 1, class: gpr }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
body: |
bb.1 (%ir-block.0):
liveins: %rdi, %xmm0
%0(s32) = COPY %xmm0
%1(p0) = COPY %rdi
; CHECK: %1(p0) = COPY %rdi
; FAST-NEXT: %2(s32) = COPY %0(s32)
; FAST-NEXT: G_STORE %2(s32), %1(p0) :: (store 4 into %ir.p1)
; GREEDY-NEXT: G_STORE %0(s32), %1(p0) :: (store 4 into %ir.p1)
G_STORE %0(s32), %1(p0) :: (store 4 into %ir.p1)
%rax = COPY %1(p0)
RET 0, implicit %rax
...
---
name: test_store_double
alignment: 4
legalized: true
regBankSelected: false
selected: false
# CHECK-LABEL: name: test_store_double
# CHECK: registers:
# FAST-NEXT: - { id: 0, class: vecr }
# FAST-NEXT: - { id: 1, class: gpr }
# FAST-NEXT: - { id: 2, class: gpr }
# GREEDY-NEXT: - { id: 0, class: vecr }
# GREEDY-NEXT: - { id: 1, class: gpr }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
body: |
bb.1 (%ir-block.0):
liveins: %rdi, %xmm0
%0(s64) = COPY %xmm0
%1(p0) = COPY %rdi
; CHECK: %1(p0) = COPY %rdi
; FAST-NEXT: %2(s64) = COPY %0(s64)
; FAST-NEXT: G_STORE %2(s64), %1(p0) :: (store 8 into %ir.p1)
; GREEDY-NEXT: G_STORE %0(s64), %1(p0) :: (store 8 into %ir.p1)
G_STORE %0(s64), %1(p0) :: (store 8 into %ir.p1)
%rax = COPY %1(p0)
RET 0, implicit %rax
...
---
name: constInt_check
alignment: 4
legalized: true
# CHECK-LABEL: name: constInt_check
# CHECK: registers:
# CHECK-NEXT: - { id: 0, class: gpr }
# CHECK-NEXT: - { id: 1, class: gpr }
# CHECK-NEXT: - { id: 2, class: gpr }
# CHECK-NEXT: - { id: 3, class: gpr }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
body: |
bb.0 (%ir-block.0):
%0(s8) = G_CONSTANT i8 8
%1(s16) = G_CONSTANT i16 16
%2(s32) = G_CONSTANT i32 32
%3(s64) = G_CONSTANT i64 64
RET 0
...
---
name: trunc_check
alignment: 4
legalized: true
# CHECK-LABEL: name: trunc_check
# CHECK: registers:
# CHECK-NEXT: - { id: 0, class: gpr }
# CHECK-NEXT: - { id: 1, class: gpr }
# CHECK-NEXT: - { id: 2, class: gpr }
# CHECK-NEXT: - { id: 3, class: gpr }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
- { id: 3, class: _ }
body: |
bb.0 (%ir-block.0):
%0(s32) = IMPLICIT_DEF
%1(s1) = G_TRUNC %0(s32)
%2(s8) = G_TRUNC %0(s32)
%3(s16) = G_TRUNC %0(s32)
RET 0
...