forked from OSchip/llvm-project
25 lines
1.3 KiB
LLVM
25 lines
1.3 KiB
LLVM
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; RUN: llc -march=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefixes=GCN,NO-ECC %s
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; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=+sram-ecc < %s | FileCheck -check-prefixes=GCN,NO-ECC %s
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; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=-sram-ecc < %s | FileCheck -check-prefixes=GCN,NO-ECC %s
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; RUN: llc -march=amdgcn -mcpu=gfx902 -mattr=+sram-ecc < %s | FileCheck -check-prefixes=GCN,NO-ECC %s
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; RUN: llc -march=amdgcn -mcpu=gfx904 -mattr=+sram-ecc < %s | FileCheck -check-prefixes=GCN,NO-ECC %s
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; RUN: llc -march=amdgcn -mcpu=gfx906 -mattr=+sram-ecc < %s | FileCheck -check-prefixes=GCN,ECC %s
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; RUN: llc -march=amdgcn -mcpu=gfx906 -mattr=-sram-ecc < %s | FileCheck -check-prefixes=GCN,NO-ECC %s
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; Make sure the correct set of targets are marked with
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; FeatureDoesNotSupportSRAMECC, and +sram-ecc is ignored if it's never
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; supported.
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; GCN-LABEL: {{^}}load_global_hi_v2i16_reglo_vreg:
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; NO-ECC: global_load_short_d16_hi
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; ECC: global_load_ushort
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define void @load_global_hi_v2i16_reglo_vreg(i16 addrspace(1)* %in, i16 %reg) {
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entry:
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%gep = getelementptr inbounds i16, i16 addrspace(1)* %in, i64 -2047
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%load = load i16, i16 addrspace(1)* %gep
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%build0 = insertelement <2 x i16> undef, i16 %reg, i32 0
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%build1 = insertelement <2 x i16> %build0, i16 %load, i32 1
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store <2 x i16> %build1, <2 x i16> addrspace(1)* undef
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ret void
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}
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