forked from OSchip/llvm-project
232 lines
8.7 KiB
Plaintext
232 lines
8.7 KiB
Plaintext
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -run-pass si-fold-operands,dead-mi-elimination %s -o - | FileCheck -check-prefix=GCN %s
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---
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# First operand is FI is in a VGPR, other operand is a VGPR
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name: shrink_vgpr_fi_vgpr_v_add_i32_e64_no_carry_out_use
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tracksRegLiveness: true
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stack:
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- { id: 0, type: default, offset: 0, size: 64, alignment: 16 }
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body: |
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bb.0:
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liveins: $vgpr0
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; GCN-LABEL: name: shrink_vgpr_fi_vgpr_v_add_i32_e64_no_carry_out_use
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; GCN: liveins: $vgpr0
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; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
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; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64 = V_ADD_I32_e64 [[V_MOV_B32_e32_]], [[COPY]], 0, implicit $exec
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; GCN: S_ENDPGM 0, implicit [[V_ADD_I32_e64_]]
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%0:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
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%1:vgpr_32 = COPY $vgpr0
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%2:vgpr_32, %3:sreg_64 = V_ADD_I32_e64 %0, %1, 0, implicit $exec
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S_ENDPGM 0, implicit %2
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...
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---
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# First operand is a VGPR, other operand FI is in a VGPR
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name: shrink_vgpr_vgpr_fi_v_add_i32_e64_no_carry_out_use
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tracksRegLiveness: true
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stack:
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- { id: 0, type: default, offset: 0, size: 64, alignment: 16 }
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body: |
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bb.0:
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liveins: $vgpr0
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; GCN-LABEL: name: shrink_vgpr_vgpr_fi_v_add_i32_e64_no_carry_out_use
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; GCN: liveins: $vgpr0
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; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
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; GCN: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64 = V_ADD_I32_e64 [[COPY]], [[V_MOV_B32_e32_]], 0, implicit $exec
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; GCN: S_ENDPGM 0, implicit [[V_ADD_I32_e64_]]
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%0:vgpr_32 = COPY $vgpr0
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%1:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
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%2:vgpr_32, %3:sreg_64 = V_ADD_I32_e64 %0, %1, 0, implicit $exec
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S_ENDPGM 0, implicit %2
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...
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---
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# First operand is FI is in an SGPR, other operand is a VGPR
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name: shrink_vgpr_fi_sgpr_v_add_i32_e64_no_carry_out_use
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tracksRegLiveness: true
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stack:
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- { id: 0, type: default, offset: 0, size: 64, alignment: 16 }
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body: |
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bb.0:
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liveins: $sgpr0
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; GCN-LABEL: name: shrink_vgpr_fi_sgpr_v_add_i32_e64_no_carry_out_use
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; GCN: liveins: $sgpr0
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; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
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; GCN: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
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; GCN: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64 = V_ADD_I32_e64 [[V_MOV_B32_e32_]], [[COPY]], 0, implicit $exec
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; GCN: S_ENDPGM 0, implicit [[V_ADD_I32_e64_]]
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%0:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
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%1:sreg_32_xm0 = COPY $sgpr0
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%2:vgpr_32, %3:sreg_64 = V_ADD_I32_e64 %0, %1, 0, implicit $exec
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S_ENDPGM 0, implicit %2
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...
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---
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# First operand is an SGPR, other operand FI is in a VGPR
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name: shrink_sgpr_vgpr_fi_v_add_i32_e64_no_carry_out_use
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tracksRegLiveness: true
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stack:
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- { id: 0, type: default, offset: 0, size: 64, alignment: 16 }
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body: |
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bb.0:
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liveins: $sgpr0
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; GCN-LABEL: name: shrink_sgpr_vgpr_fi_v_add_i32_e64_no_carry_out_use
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; GCN: liveins: $sgpr0
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; GCN: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
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; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
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; GCN: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64 = V_ADD_I32_e64 [[COPY]], [[V_MOV_B32_e32_]], 0, implicit $exec
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; GCN: S_ENDPGM 0, implicit [[V_ADD_I32_e64_]]
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%0:sreg_32_xm0 = COPY $sgpr0
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%1:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
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%2:vgpr_32, %3:sreg_64 = V_ADD_I32_e64 %0, %1, 0, implicit $exec
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S_ENDPGM 0, implicit %2
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...
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---
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# First operand is FI is in an SGPR, other operand is a VGPR
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name: shrink_sgpr_fi_vgpr_v_add_i32_e64_no_carry_out_use
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tracksRegLiveness: true
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stack:
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- { id: 0, type: default, offset: 0, size: 64, alignment: 16 }
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body: |
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bb.0:
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liveins: $vgpr0
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; GCN-LABEL: name: shrink_sgpr_fi_vgpr_v_add_i32_e64_no_carry_out_use
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; GCN: liveins: $vgpr0
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; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 %stack.0
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; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64 = V_ADD_I32_e64 [[S_MOV_B32_]], [[COPY]], 0, implicit $exec
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; GCN: S_ENDPGM 0, implicit [[V_ADD_I32_e64_]]
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%0:sreg_32_xm0 = S_MOV_B32 %stack.0
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%1:vgpr_32 = COPY $vgpr0
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%2:vgpr_32, %3:sreg_64 = V_ADD_I32_e64 %0, %1, 0, implicit $exec
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S_ENDPGM 0, implicit %2
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...
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---
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# First operand is a VGPR, other operand FI is in an SGPR
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name: shrink_vgpr_sgpr_fi_v_add_i32_e64_no_carry_out_use
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tracksRegLiveness: true
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stack:
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- { id: 0, type: default, offset: 0, size: 64, alignment: 16}
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body: |
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bb.0:
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liveins: $vgpr0
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; GCN-LABEL: name: shrink_vgpr_sgpr_fi_v_add_i32_e64_no_carry_out_use
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; GCN: liveins: $vgpr0
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; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 %stack.0
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; GCN: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64 = V_ADD_I32_e64 [[COPY]], [[S_MOV_B32_]], 0, implicit $exec
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; GCN: S_ENDPGM 0, implicit [[V_ADD_I32_e64_]]
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%0:vgpr_32 = COPY $vgpr0
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%1:sreg_32_xm0 = S_MOV_B32 %stack.0
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%2:vgpr_32, %3:sreg_64 = V_ADD_I32_e64 %0, %1, 0, implicit $exec
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S_ENDPGM 0, implicit %2
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...
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---
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# First operand is FI is in a VGPR, other operand is an inline imm in a VGPR
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name: shrink_vgpr_imm_fi_vgpr_v_add_i32_e64_no_carry_out_use
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tracksRegLiveness: true
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stack:
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- { id: 0, type: default, offset: 0, size: 64, alignment: 16 }
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body: |
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bb.0:
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; GCN-LABEL: name: shrink_vgpr_imm_fi_vgpr_v_add_i32_e64_no_carry_out_use
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; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
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; GCN: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64 = V_ADD_I32_e64 [[V_MOV_B32_e32_]], 16, 0, implicit $exec
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; GCN: S_ENDPGM 0, implicit [[V_ADD_I32_e64_]]
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%0:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
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%1:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
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%2:vgpr_32, %3:sreg_64 = V_ADD_I32_e64 %0, %1, 0, implicit $exec
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S_ENDPGM 0, implicit %2
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...
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---
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# First operand is an inline imm in a VGPR, other operand FI is in a VGPR
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name: shrink_vgpr_imm_vgpr_fi_v_add_i32_e64_no_carry_out_use
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tracksRegLiveness: true
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stack:
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- { id: 0, type: default, offset: 0, size: 64, alignment: 16 }
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body: |
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bb.0:
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; GCN-LABEL: name: shrink_vgpr_imm_vgpr_fi_v_add_i32_e64_no_carry_out_use
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; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
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; GCN: [[V_ADD_I32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_I32_e64_1:%[0-9]+]]:sreg_64 = V_ADD_I32_e64 16, [[V_MOV_B32_e32_]], 0, implicit $exec
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; GCN: S_ENDPGM 0, implicit [[V_ADD_I32_e64_]]
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%0:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
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%1:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
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%2:vgpr_32, %3:sreg_64 = V_ADD_I32_e64 %0, %1, 0, implicit $exec
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S_ENDPGM 0, implicit %2
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...
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---
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# First operand is FI is in a VGPR, other operand is an literal constant in a VGPR
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name: shrink_vgpr_k_fi_vgpr_v_add_i32_e64_no_carry_out_use
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tracksRegLiveness: true
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stack:
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- { id: 0, type: default, offset: 0, size: 64, alignment: 16 }
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body: |
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bb.0:
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; GCN-LABEL: name: shrink_vgpr_k_fi_vgpr_v_add_i32_e64_no_carry_out_use
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; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
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; GCN: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1234, implicit $exec
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; GCN: [[V_ADD_I32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_I32_e32 [[V_MOV_B32_e32_]], [[V_MOV_B32_e32_1]], implicit-def $vcc, implicit $exec
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; GCN: S_ENDPGM 0, implicit [[V_ADD_I32_e32_]]
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%0:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
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%1:vgpr_32 = V_MOV_B32_e32 1234, implicit $exec
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%2:vgpr_32, %3:sreg_64 = V_ADD_I32_e64 %0, %1, 0, implicit $exec
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S_ENDPGM 0, implicit %2
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...
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---
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# First operand is a literal constant in a VGPR, other operand FI is in a VGPR
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name: shrink_vgpr_k_vgpr_fi_v_add_i32_e64_no_carry_out_use
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tracksRegLiveness: true
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stack:
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- { id: 0, type: default, offset: 0, size: 64, alignment: 16 }
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body: |
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bb.0:
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; GCN-LABEL: name: shrink_vgpr_k_vgpr_fi_v_add_i32_e64_no_carry_out_use
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; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1234, implicit $exec
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; GCN: [[V_ADD_I32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_I32_e32 %stack.0, [[V_MOV_B32_e32_]], implicit-def $vcc, implicit $exec
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; GCN: S_ENDPGM 0, implicit [[V_ADD_I32_e32_]]
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%0:vgpr_32 = V_MOV_B32_e32 1234, implicit $exec
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%1:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
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%2:vgpr_32, %3:sreg_64 = V_ADD_I32_e64 %0, %1, 0, implicit $exec
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S_ENDPGM 0, implicit %2
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...
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