2018-02-13 12:19:23 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl --show-mc-encoding | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512-KNL
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx --show-mc-encoding | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512-SKX
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx --show-mc-encoding | FileCheck %s --check-prefix=CHECK --check-prefix=AVX
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2015-03-01 15:44:04 +08:00
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define float @test_fdiv(float %a, float %b) {
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2018-02-13 12:19:23 +08:00
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; AVX512-LABEL: test_fdiv:
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; AVX512: ## %bb.0:
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; AVX512-NEXT: vdivss %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfa,0x5e,0xc1]
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; AVX512-NEXT: retq ## encoding: [0xc3]
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;
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; AVX-LABEL: test_fdiv:
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; AVX: ## %bb.0:
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; AVX-NEXT: vdivss %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x5e,0xc1]
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; AVX-NEXT: retq ## encoding: [0xc3]
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2015-03-01 15:44:04 +08:00
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%c = fdiv float %a, %b
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ret float %c
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}
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define float @test_fsub(float %a, float %b) {
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2018-02-13 12:19:23 +08:00
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; AVX512-LABEL: test_fsub:
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; AVX512: ## %bb.0:
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; AVX512-NEXT: vsubss %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfa,0x5c,0xc1]
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; AVX512-NEXT: retq ## encoding: [0xc3]
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;
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; AVX-LABEL: test_fsub:
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; AVX: ## %bb.0:
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; AVX-NEXT: vsubss %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x5c,0xc1]
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; AVX-NEXT: retq ## encoding: [0xc3]
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2015-03-01 15:44:04 +08:00
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%c = fsub float %a, %b
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ret float %c
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}
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define double @test_fadd(double %a, double %b) {
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2018-02-13 12:19:23 +08:00
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; AVX512-LABEL: test_fadd:
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; AVX512: ## %bb.0:
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; AVX512-NEXT: vaddsd %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfb,0x58,0xc1]
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; AVX512-NEXT: retq ## encoding: [0xc3]
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;
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; AVX-LABEL: test_fadd:
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; AVX: ## %bb.0:
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; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x58,0xc1]
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; AVX-NEXT: retq ## encoding: [0xc3]
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2015-03-01 15:44:04 +08:00
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%c = fadd double %a, %b
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ret double %c
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}
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declare float @llvm.trunc.f32(float %Val)
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declare double @llvm.trunc.f64(double %Val)
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declare float @llvm.rint.f32(float %Val)
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declare double @llvm.rint.f64(double %Val)
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declare double @llvm.sqrt.f64(double %Val)
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declare float @llvm.sqrt.f32(float %Val)
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define float @test_trunc(float %a) {
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2018-02-13 12:19:23 +08:00
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; AVX512-LABEL: test_trunc:
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; AVX512: ## %bb.0:
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2018-02-13 12:19:26 +08:00
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; AVX512-NEXT: vroundss $11, %xmm0, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc4,0xe3,0x79,0x0a,0xc0,0x0b]
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2018-02-13 12:19:23 +08:00
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; AVX512-NEXT: retq ## encoding: [0xc3]
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;
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; AVX-LABEL: test_trunc:
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; AVX: ## %bb.0:
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; AVX-NEXT: vroundss $11, %xmm0, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x0a,0xc0,0x0b]
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; AVX-NEXT: retq ## encoding: [0xc3]
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2015-03-01 15:44:04 +08:00
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%c = call float @llvm.trunc.f32(float %a)
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ret float %c
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}
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define double @test_sqrt(double %a) {
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2018-02-13 12:19:23 +08:00
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; AVX512-LABEL: test_sqrt:
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; AVX512: ## %bb.0:
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; AVX512-NEXT: vsqrtsd %xmm0, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfb,0x51,0xc0]
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; AVX512-NEXT: retq ## encoding: [0xc3]
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;
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; AVX-LABEL: test_sqrt:
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; AVX: ## %bb.0:
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; AVX-NEXT: vsqrtsd %xmm0, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x51,0xc0]
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; AVX-NEXT: retq ## encoding: [0xc3]
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2015-03-01 15:44:04 +08:00
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%c = call double @llvm.sqrt.f64(double %a)
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ret double %c
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}
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define float @test_rint(float %a) {
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2018-02-13 12:19:23 +08:00
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; AVX512-LABEL: test_rint:
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; AVX512: ## %bb.0:
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2018-02-13 12:19:26 +08:00
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; AVX512-NEXT: vroundss $4, %xmm0, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc4,0xe3,0x79,0x0a,0xc0,0x04]
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2018-02-13 12:19:23 +08:00
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; AVX512-NEXT: retq ## encoding: [0xc3]
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;
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; AVX-LABEL: test_rint:
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; AVX: ## %bb.0:
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; AVX-NEXT: vroundss $4, %xmm0, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x0a,0xc0,0x04]
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; AVX-NEXT: retq ## encoding: [0xc3]
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2015-03-01 15:44:04 +08:00
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%c = call float @llvm.rint.f32(float %a)
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ret float %c
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}
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define float @test_vmax(float %i, float %j) {
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2018-02-13 12:19:23 +08:00
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; AVX512-LABEL: test_vmax:
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; AVX512: ## %bb.0:
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; AVX512-NEXT: vmaxss %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfa,0x5f,0xc1]
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; AVX512-NEXT: retq ## encoding: [0xc3]
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;
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; AVX-LABEL: test_vmax:
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; AVX: ## %bb.0:
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; AVX-NEXT: vmaxss %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x5f,0xc1]
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; AVX-NEXT: retq ## encoding: [0xc3]
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2015-03-01 15:44:04 +08:00
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%cmp_res = fcmp ogt float %i, %j
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%max = select i1 %cmp_res, float %i, float %j
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ret float %max
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}
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define float @test_mov(float %a, float %b, float %i, float %j) {
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2018-02-13 12:19:23 +08:00
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; AVX512-LABEL: test_mov:
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; AVX512: ## %bb.0:
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; AVX512-NEXT: vcmpltss %xmm2, %xmm3, %k1 ## encoding: [0x62,0xf1,0x66,0x08,0xc2,0xca,0x01]
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; AVX512-NEXT: vmovss %xmm1, %xmm0, %xmm0 {%k1} ## encoding: [0x62,0xf1,0x7e,0x09,0x10,0xc1]
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; AVX512-NEXT: retq ## encoding: [0xc3]
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;
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; AVX-LABEL: test_mov:
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; AVX: ## %bb.0:
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; AVX-NEXT: vcmpltss %xmm2, %xmm3, %xmm2 ## encoding: [0xc5,0xe2,0xc2,0xd2,0x01]
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; AVX-NEXT: vblendvps %xmm2, %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x4a,0xc1,0x20]
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; AVX-NEXT: retq ## encoding: [0xc3]
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2015-03-01 15:44:04 +08:00
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%cmp_res = fcmp ogt float %i, %j
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%max = select i1 %cmp_res, float %b, float %a
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ret float %max
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}
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2016-12-18 14:23:14 +08:00
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define float @zero_float(float %a) {
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2018-02-13 12:19:23 +08:00
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; AVX512-KNL-LABEL: zero_float:
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; AVX512-KNL: ## %bb.0:
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; AVX512-KNL-NEXT: vxorps %xmm1, %xmm1, %xmm1 ## encoding: [0xc5,0xf0,0x57,0xc9]
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; AVX512-KNL-NEXT: vaddss %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfa,0x58,0xc1]
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; AVX512-KNL-NEXT: retq ## encoding: [0xc3]
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;
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; AVX512-SKX-LABEL: zero_float:
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; AVX512-SKX: ## %bb.0:
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; AVX512-SKX-NEXT: vxorps %xmm1, %xmm1, %xmm1 ## EVEX TO VEX Compression encoding: [0xc5,0xf0,0x57,0xc9]
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; AVX512-SKX-NEXT: vaddss %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfa,0x58,0xc1]
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; AVX512-SKX-NEXT: retq ## encoding: [0xc3]
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;
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; AVX-LABEL: zero_float:
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; AVX: ## %bb.0:
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; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1 ## encoding: [0xc5,0xf0,0x57,0xc9]
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; AVX-NEXT: vaddss %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x58,0xc1]
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; AVX-NEXT: retq ## encoding: [0xc3]
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2016-12-18 14:23:14 +08:00
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%b = fadd float %a, 0.0
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ret float %b
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}
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define double @zero_double(double %a) {
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2018-02-13 12:19:23 +08:00
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; AVX512-KNL-LABEL: zero_double:
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; AVX512-KNL: ## %bb.0:
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; AVX512-KNL-NEXT: vxorpd %xmm1, %xmm1, %xmm1 ## encoding: [0xc5,0xf1,0x57,0xc9]
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; AVX512-KNL-NEXT: vaddsd %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfb,0x58,0xc1]
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; AVX512-KNL-NEXT: retq ## encoding: [0xc3]
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;
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; AVX512-SKX-LABEL: zero_double:
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; AVX512-SKX: ## %bb.0:
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; AVX512-SKX-NEXT: vxorpd %xmm1, %xmm1, %xmm1 ## EVEX TO VEX Compression encoding: [0xc5,0xf1,0x57,0xc9]
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; AVX512-SKX-NEXT: vaddsd %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfb,0x58,0xc1]
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; AVX512-SKX-NEXT: retq ## encoding: [0xc3]
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;
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; AVX-LABEL: zero_double:
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; AVX: ## %bb.0:
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; AVX-NEXT: vxorpd %xmm1, %xmm1, %xmm1 ## encoding: [0xc5,0xf1,0x57,0xc9]
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; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x58,0xc1]
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; AVX-NEXT: retq ## encoding: [0xc3]
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2016-12-18 14:23:14 +08:00
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%b = fadd double %a, 0.0
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ret double %b
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}
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