2009-11-11 05:14:05 +08:00
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; RUN: opt < %s -loop-reduce -S | FileCheck %s
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; rdar://7382068
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2015-03-05 02:43:29 +08:00
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; Provide legal integer types.
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target datalayout = "n8:16:32:64"
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2009-11-11 05:14:05 +08:00
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define void @t(i32 %c) nounwind optsize {
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entry:
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br label %bb6
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bb1: ; preds = %bb6
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%tmp = icmp eq i32 %c_addr.1, 20 ; <i1> [#uses=1]
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br i1 %tmp, label %bb2, label %bb3
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bb2: ; preds = %bb1
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%tmp1 = tail call i32 @f20(i32 %c_addr.1) nounwind ; <i32> [#uses=1]
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br label %bb7
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bb3: ; preds = %bb1
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%tmp2 = icmp slt i32 %c_addr.1, 10 ; <i1> [#uses=1]
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%tmp3 = add nsw i32 %c_addr.1, 1 ; <i32> [#uses=1]
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%tmp4 = add i32 %c_addr.1, -1 ; <i32> [#uses=1]
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%c_addr.1.be = select i1 %tmp2, i32 %tmp3, i32 %tmp4 ; <i32> [#uses=1]
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%indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
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Bugfix: SCEVExpander incorrectly marks increment operations as no-wrap
(The change was landed in r230280 and caused the regression PR22674.
This version contains a fix and a test-case for PR22674).
When emitting the increment operation, SCEVExpander marks the
operation as nuw or nsw based on the flags on the preincrement SCEV.
This is incorrect because, for instance, it is possible that {-6,+,1}
is <nuw> while {-6,+,1}+1 = {-5,+,1} is not.
This change teaches SCEV to mark the increment as nuw/nsw only if it
can explicitly prove that the increment operation won't overflow.
Apart from the attached test case, another (more realistic)
manifestation of the bug can be seen in
Transforms/IndVarSimplify/pr20680.ll.
Differential Revision: http://reviews.llvm.org/D7778
llvm-svn: 230533
2015-02-26 04:02:59 +08:00
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; CHECK: add nsw i32 %lsr.iv, -1
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2009-11-11 05:14:05 +08:00
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br label %bb6
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bb6: ; preds = %bb3, %entry
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%indvar = phi i32 [ %indvar.next, %bb3 ], [ 0, %entry ] ; <i32> [#uses=2]
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%c_addr.1 = phi i32 [ %c_addr.1.be, %bb3 ], [ %c, %entry ] ; <i32> [#uses=7]
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%tmp5 = icmp eq i32 %indvar, 9999 ; <i1> [#uses=1]
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; CHECK: icmp eq i32 %lsr.iv, 0
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%tmp6 = icmp eq i32 %c_addr.1, 100 ; <i1> [#uses=1]
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%or.cond = or i1 %tmp5, %tmp6 ; <i1> [#uses=1]
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br i1 %or.cond, label %bb7, label %bb1
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bb7: ; preds = %bb6, %bb2
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%c_addr.0 = phi i32 [ %tmp1, %bb2 ], [ %c_addr.1, %bb6 ] ; <i32> [#uses=1]
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tail call void @bar(i32 %c_addr.0) nounwind
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ret void
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}
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declare i32 @f20(i32)
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declare void @bar(i32)
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