2019-02-05 08:49:55 +08:00
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// WebAssemblyInstrBulkMemory.td - bulk memory codegen support --*- tablegen -*-
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// WebAssembly bulk memory codegen constructs.
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///
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//===----------------------------------------------------------------------===//
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// Instruction requiring HasBulkMemory and the bulk memory prefix byte
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multiclass BULK_I<dag oops_r, dag iops_r, dag oops_s, dag iops_s,
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list<dag> pattern_r, string asmstr_r = "",
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string asmstr_s = "", bits<32> simdop = -1> {
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defm "" : I<oops_r, iops_r, oops_s, iops_s, pattern_r, asmstr_r, asmstr_s,
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!or(0xfc00, !and(0xff, simdop))>,
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Requires<[HasBulkMemory]>;
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}
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// Bespoke types and nodes for bulk memory ops
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2019-02-14 06:11:16 +08:00
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def wasm_memcpy_t : SDTypeProfile<0, 5,
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[SDTCisInt<0>, SDTCisInt<1>, SDTCisPtrTy<2>, SDTCisPtrTy<3>, SDTCisInt<4>]
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2019-02-05 08:49:55 +08:00
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>;
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def wasm_memcpy : SDNode<"WebAssemblyISD::MEMORY_COPY", wasm_memcpy_t,
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[SDNPHasChain, SDNPMayLoad, SDNPMayStore]>;
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2019-02-14 06:25:18 +08:00
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def wasm_memset_t : SDTypeProfile<0, 4,
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[SDTCisInt<0>, SDTCisPtrTy<1>, SDTCisInt<2>, SDTCisInt<3>]
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>;
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def wasm_memset : SDNode<"WebAssemblyISD::MEMORY_FILL", wasm_memset_t,
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[SDNPHasChain, SDNPMayStore]>;
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2019-02-14 06:11:16 +08:00
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2019-02-14 06:25:18 +08:00
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let mayStore = 1, hasSideEffects = 1 in
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2019-02-14 06:11:16 +08:00
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defm MEMORY_INIT :
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BULK_I<(outs),
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(ins i32imm_op:$seg, i32imm_op:$idx, I32:$dest,
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I32:$offset, I32:$size),
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(outs), (ins i32imm_op:$seg, i32imm_op:$idx),
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Revert r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"
This broke the Chromium build, causing it to fail with e.g.
fatal error: error in backend: Cannot select: t362: v4i32 = X86ISD::VSHLI t392, Constant:i8<15>
See llvm-commits thread of r372285 for details.
This also reverts r372286, r372287, r372288, r372289, r372290, r372291,
r372292, r372293, r372296, and r372297, which seemed to depend on the
main commit.
> Encode them directly as an imm argument to G_INTRINSIC*.
>
> Since now intrinsics can now define what parameters are required to be
> immediates, avoid using registers for them. Intrinsics could
> potentially want a constant that isn't a legal register type. Also,
> since G_CONSTANT is subject to CSE and legalization, transforms could
> potentially obscure the value (and create extra work for the
> selector). The register bank of a G_CONSTANT is also meaningful, so
> this could throw off future folding and legalization logic for AMDGPU.
>
> This will be much more convenient to work with than needing to call
> getConstantVRegVal and checking if it may have failed for every
> constant intrinsic parameter. AMDGPU has quite a lot of intrinsics wth
> immarg operands, many of which need inspection during lowering. Having
> to find the value in a register is going to add a lot of boilerplate
> and waste compile time.
>
> SelectionDAG has always provided TargetConstant for constants which
> should not be legalized or materialized in a register. The distinction
> between Constant and TargetConstant was somewhat fuzzy, and there was
> no automatic way to force usage of TargetConstant for certain
> intrinsic parameters. They were both ultimately ConstantSDNode, and it
> was inconsistently used. It was quite easy to mis-select an
> instruction requiring an immediate. For SelectionDAG, start emitting
> TargetConstant for these arguments, and using timm to match them.
>
> Most of the work here is to cleanup target handling of constants. Some
> targets process intrinsics through intermediate custom nodes, which
> need to preserve TargetConstant usage to match the intrinsic
> expectation. Pattern inputs now need to distinguish whether a constant
> is merely compatible with an operand or whether it is mandatory.
>
> The GlobalISelEmitter needs to treat timm as a special case of a leaf
> node, simlar to MachineBasicBlock operands. This should also enable
> handling of patterns for some G_* instructions with immediates, like
> G_FENCE or G_EXTRACT.
>
> This does include a workaround for a crash in GlobalISelEmitter when
> ARM tries to uses "imm" in an output with a "timm" pattern source.
llvm-svn: 372314
2019-09-19 20:33:07 +08:00
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[(int_wasm_memory_init (i32 imm:$seg), (i32 imm:$idx), I32:$dest,
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2019-02-14 06:11:16 +08:00
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I32:$offset, I32:$size
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)],
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"memory.init\t$seg, $idx, $dest, $offset, $size",
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"memory.init\t$seg, $idx", 0x08>;
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2019-02-14 06:25:18 +08:00
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let hasSideEffects = 1 in
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2019-02-14 06:11:16 +08:00
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defm DATA_DROP :
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BULK_I<(outs), (ins i32imm_op:$seg), (outs), (ins i32imm_op:$seg),
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Revert r372285 "GlobalISel: Don't materialize immarg arguments to intrinsics"
This broke the Chromium build, causing it to fail with e.g.
fatal error: error in backend: Cannot select: t362: v4i32 = X86ISD::VSHLI t392, Constant:i8<15>
See llvm-commits thread of r372285 for details.
This also reverts r372286, r372287, r372288, r372289, r372290, r372291,
r372292, r372293, r372296, and r372297, which seemed to depend on the
main commit.
> Encode them directly as an imm argument to G_INTRINSIC*.
>
> Since now intrinsics can now define what parameters are required to be
> immediates, avoid using registers for them. Intrinsics could
> potentially want a constant that isn't a legal register type. Also,
> since G_CONSTANT is subject to CSE and legalization, transforms could
> potentially obscure the value (and create extra work for the
> selector). The register bank of a G_CONSTANT is also meaningful, so
> this could throw off future folding and legalization logic for AMDGPU.
>
> This will be much more convenient to work with than needing to call
> getConstantVRegVal and checking if it may have failed for every
> constant intrinsic parameter. AMDGPU has quite a lot of intrinsics wth
> immarg operands, many of which need inspection during lowering. Having
> to find the value in a register is going to add a lot of boilerplate
> and waste compile time.
>
> SelectionDAG has always provided TargetConstant for constants which
> should not be legalized or materialized in a register. The distinction
> between Constant and TargetConstant was somewhat fuzzy, and there was
> no automatic way to force usage of TargetConstant for certain
> intrinsic parameters. They were both ultimately ConstantSDNode, and it
> was inconsistently used. It was quite easy to mis-select an
> instruction requiring an immediate. For SelectionDAG, start emitting
> TargetConstant for these arguments, and using timm to match them.
>
> Most of the work here is to cleanup target handling of constants. Some
> targets process intrinsics through intermediate custom nodes, which
> need to preserve TargetConstant usage to match the intrinsic
> expectation. Pattern inputs now need to distinguish whether a constant
> is merely compatible with an operand or whether it is mandatory.
>
> The GlobalISelEmitter needs to treat timm as a special case of a leaf
> node, simlar to MachineBasicBlock operands. This should also enable
> handling of patterns for some G_* instructions with immediates, like
> G_FENCE or G_EXTRACT.
>
> This does include a workaround for a crash in GlobalISelEmitter when
> ARM tries to uses "imm" in an output with a "timm" pattern source.
llvm-svn: 372314
2019-09-19 20:33:07 +08:00
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[(int_wasm_data_drop (i32 imm:$seg))],
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2019-02-14 06:11:16 +08:00
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"data.drop\t$seg", "data.drop\t$seg", 0x09>;
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2019-02-05 08:49:55 +08:00
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let mayLoad = 1, mayStore = 1 in
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2019-02-14 06:11:16 +08:00
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defm MEMORY_COPY :
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BULK_I<(outs), (ins i32imm_op:$src_idx, i32imm_op:$dst_idx,
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I32:$dst, I32:$src, I32:$len),
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(outs), (ins i32imm_op:$src_idx, i32imm_op:$dst_idx),
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[(wasm_memcpy (i32 imm:$src_idx), (i32 imm:$dst_idx),
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I32:$dst, I32:$src, I32:$len
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)],
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"memory.copy\t$src_idx, $dst_idx, $dst, $src, $len",
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"memory.copy\t$src_idx, $dst_idx", 0x0a>;
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2019-02-14 06:25:18 +08:00
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let mayStore = 1 in
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defm MEMORY_FILL :
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BULK_I<(outs), (ins i32imm_op:$idx, I32:$dst, I32:$value, I32:$size),
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(outs), (ins i32imm_op:$idx),
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[(wasm_memset (i32 imm:$idx), I32:$dst, I32:$value, I32:$size)],
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"memory.fill\t$idx, $dst, $value, $size",
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"memory.fill\t$idx", 0x0b>;
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