2017-10-19 07:18:12 +08:00
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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2017-09-04 17:06:45 +08:00
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# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=ALL
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--- |
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define zeroext i1 @test_i1(i32 %a, i1 zeroext %f, i1 zeroext %t) {
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entry:
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%cmp = icmp sgt i32 %a, 0
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br i1 %cmp, label %cond.true, label %cond.false
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cond.true: ; preds = %entry
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br label %cond.end
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cond.false: ; preds = %entry
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br label %cond.end
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cond.end: ; preds = %cond.false, %cond.true
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%cond = phi i1 [ %f, %cond.true ], [ %t, %cond.false ]
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ret i1 %cond
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}
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define i8 @test_i8(i32 %a, i8 %f, i8 %t) {
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entry:
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%cmp = icmp sgt i32 %a, 0
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br i1 %cmp, label %cond.true, label %cond.false
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cond.true: ; preds = %entry
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br label %cond.end
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cond.false: ; preds = %entry
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br label %cond.end
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cond.end: ; preds = %cond.false, %cond.true
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%cond = phi i8 [ %f, %cond.true ], [ %t, %cond.false ]
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ret i8 %cond
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}
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define i16 @test_i16(i32 %a, i16 %f, i16 %t) {
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entry:
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%cmp = icmp sgt i32 %a, 0
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br i1 %cmp, label %cond.true, label %cond.false
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cond.true: ; preds = %entry
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br label %cond.end
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cond.false: ; preds = %entry
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br label %cond.end
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cond.end: ; preds = %cond.false, %cond.true
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%cond = phi i16 [ %f, %cond.true ], [ %t, %cond.false ]
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ret i16 %cond
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}
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define i32 @test_i32(i32 %a, i32 %f, i32 %t) {
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entry:
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%cmp = icmp sgt i32 %a, 0
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br i1 %cmp, label %cond.true, label %cond.false
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cond.true: ; preds = %entry
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br label %cond.end
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cond.false: ; preds = %entry
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br label %cond.end
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cond.end: ; preds = %cond.false, %cond.true
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%cond = phi i32 [ %f, %cond.true ], [ %t, %cond.false ]
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ret i32 %cond
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}
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define i64 @test_i64(i32 %a, i64 %f, i64 %t) {
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entry:
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%cmp = icmp sgt i32 %a, 0
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br i1 %cmp, label %cond.true, label %cond.false
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cond.true: ; preds = %entry
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br label %cond.end
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cond.false: ; preds = %entry
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br label %cond.end
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cond.end: ; preds = %cond.false, %cond.true
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%cond = phi i64 [ %f, %cond.true ], [ %t, %cond.false ]
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ret i64 %cond
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}
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define float @test_float(i32 %a, float %f, float %t) {
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entry:
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%cmp = icmp sgt i32 %a, 0
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br i1 %cmp, label %cond.true, label %cond.false
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cond.true: ; preds = %entry
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br label %cond.end
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cond.false: ; preds = %entry
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br label %cond.end
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cond.end: ; preds = %cond.false, %cond.true
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%cond = phi float [ %f, %cond.true ], [ %t, %cond.false ]
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ret float %cond
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}
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define double @test_double(i32 %a, double %f, double %t) {
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entry:
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%cmp = icmp sgt i32 %a, 0
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br i1 %cmp, label %cond.true, label %cond.false
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cond.true: ; preds = %entry
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br label %cond.end
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cond.false: ; preds = %entry
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br label %cond.end
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cond.end: ; preds = %cond.false, %cond.true
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%cond = phi double [ %f, %cond.true ], [ %t, %cond.false ]
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ret double %cond
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}
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...
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---
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name: test_i1
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alignment: 4
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legalized: false
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regBankSelected: false
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _, preferred-register: '' }
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- { id: 1, class: _, preferred-register: '' }
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- { id: 2, class: _, preferred-register: '' }
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- { id: 3, class: _, preferred-register: '' }
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- { id: 4, class: _, preferred-register: '' }
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- { id: 5, class: _, preferred-register: '' }
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- { id: 6, class: _, preferred-register: '' }
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liveins:
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fixedStack:
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stack:
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constants:
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2017-10-19 07:18:12 +08:00
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2017-09-04 17:06:45 +08:00
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body: |
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2017-10-19 07:18:12 +08:00
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; ALL-LABEL: name: test_i1
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2017-12-05 01:18:51 +08:00
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; ALL: bb.0.{{[a-zA-Z0-9]+}}:
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; ALL: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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2017-10-19 07:18:12 +08:00
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; ALL: liveins: %edi, %edx, %esi
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2017-10-25 02:04:54 +08:00
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; ALL: [[COPY:%[0-9]+]]:_(s32) = COPY %edi
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; ALL: [[COPY1:%[0-9]+]]:_(s1) = COPY %esi
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; ALL: [[COPY2:%[0-9]+]]:_(s1) = COPY %edx
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; ALL: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; ALL: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[COPY]](s32), [[C]]
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2017-12-05 01:18:51 +08:00
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; ALL: G_BRCOND [[ICMP]](s1), %bb.1
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; ALL: G_BR %bb.2
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2017-10-19 07:18:12 +08:00
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; ALL: bb.1.cond.true:
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2017-12-05 01:18:51 +08:00
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; ALL: successors: %bb.3(0x80000000)
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2017-10-25 02:04:54 +08:00
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; ALL: [[ANYEXT:%[0-9]+]]:_(s8) = G_ANYEXT [[COPY1]](s1)
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2017-12-05 01:18:51 +08:00
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; ALL: G_BR %bb.3
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2017-10-19 07:18:12 +08:00
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; ALL: bb.2.cond.false:
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2017-12-05 01:18:51 +08:00
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; ALL: successors: %bb.3(0x80000000)
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2017-10-25 02:04:54 +08:00
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; ALL: [[ANYEXT1:%[0-9]+]]:_(s8) = G_ANYEXT [[COPY2]](s1)
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2017-10-19 07:18:12 +08:00
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; ALL: bb.3.cond.end:
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2017-12-05 01:18:51 +08:00
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; ALL: [[PHI:%[0-9]+]]:_(s8) = G_PHI [[ANYEXT]](s8), %bb.1, [[ANYEXT1]](s8), %bb.2
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[GISel]: Rework legalization algorithm for better elimination of
artifacts along with DCE
Legalization Artifacts are all those insts that are there to make the
type system happy. Currently, the target needs to say all combinations
of extends and truncs are legal and there's no way of verifying that
post legalization, we only have *truly* legal instructions. This patch
changes roughly the legalization algorithm to process all illegal insts
at one go, and then process all truncs/extends that were added to
satisfy the type constraints separately trying to combine trivial cases
until they converge. This has the added benefit that, the target
legalizerinfo can only say which truncs and extends are okay and the
artifact combiner would combine away other exts and truncs.
Updated legalization algorithm to roughly the following pseudo code.
WorkList Insts, Artifacts;
collect_all_insts_and_artifacts(Insts, Artifacts);
do {
for (Inst in Insts)
legalizeInstrStep(Inst, Insts, Artifacts);
for (Artifact in Artifacts)
tryCombineArtifact(Artifact, Insts, Artifacts);
} while(!Insts.empty());
Also, wrote a simple wrapper equivalent to SetVector, except for
erasing, it avoids moving all elements over by one and instead just
nulls them out.
llvm-svn: 318210
2017-11-15 06:42:19 +08:00
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; ALL: %al = COPY
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2017-10-19 07:18:12 +08:00
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; ALL: RET 0, implicit %al
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2017-09-04 17:06:45 +08:00
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bb.1.entry:
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2017-12-05 01:18:51 +08:00
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successors: %bb.2(0x40000000), %bb.3(0x40000000)
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2017-09-04 17:06:45 +08:00
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liveins: %edi, %edx, %esi
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%0(s32) = COPY %edi
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%1(s1) = COPY %esi
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%2(s1) = COPY %edx
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%3(s32) = G_CONSTANT i32 0
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%4(s1) = G_ICMP intpred(sgt), %0(s32), %3
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2017-12-05 01:18:51 +08:00
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G_BRCOND %4(s1), %bb.2
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G_BR %bb.3
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2017-09-04 17:06:45 +08:00
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bb.2.cond.true:
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2017-12-05 01:18:51 +08:00
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successors: %bb.4(0x80000000)
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2017-09-04 17:06:45 +08:00
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2017-12-05 01:18:51 +08:00
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G_BR %bb.4
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2017-09-04 17:06:45 +08:00
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bb.3.cond.false:
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2017-12-05 01:18:51 +08:00
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successors: %bb.4(0x80000000)
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2017-09-04 17:06:45 +08:00
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bb.4.cond.end:
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2017-12-05 01:18:51 +08:00
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%5(s1) = G_PHI %1(s1), %bb.2, %2(s1), %bb.3
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2017-09-04 17:06:45 +08:00
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%6(s8) = G_ZEXT %5(s1)
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%al = COPY %6(s8)
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RET 0, implicit %al
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...
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---
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name: test_i8
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alignment: 4
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legalized: false
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regBankSelected: false
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _, preferred-register: '' }
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- { id: 1, class: _, preferred-register: '' }
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- { id: 2, class: _, preferred-register: '' }
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- { id: 3, class: _, preferred-register: '' }
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- { id: 4, class: _, preferred-register: '' }
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- { id: 5, class: _, preferred-register: '' }
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liveins:
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fixedStack:
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stack:
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constants:
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2017-10-19 07:18:12 +08:00
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2017-09-04 17:06:45 +08:00
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body: |
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2017-10-19 07:18:12 +08:00
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; ALL-LABEL: name: test_i8
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2017-12-05 01:18:51 +08:00
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; ALL: bb.0.{{[a-zA-Z0-9]+}}:
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; ALL: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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2017-10-19 07:18:12 +08:00
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; ALL: liveins: %edi, %edx, %esi
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2017-10-25 02:04:54 +08:00
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; ALL: [[COPY:%[0-9]+]]:_(s32) = COPY %edi
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; ALL: [[COPY1:%[0-9]+]]:_(s8) = COPY %sil
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; ALL: [[COPY2:%[0-9]+]]:_(s8) = COPY %edx
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; ALL: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; ALL: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[COPY]](s32), [[C]]
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2017-12-05 01:18:51 +08:00
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; ALL: G_BRCOND [[ICMP]](s1), %bb.1
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; ALL: G_BR %bb.2
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2017-10-19 07:18:12 +08:00
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; ALL: bb.1.cond.true:
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2017-12-05 01:18:51 +08:00
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; ALL: successors: %bb.3(0x80000000)
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; ALL: G_BR %bb.3
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2017-10-19 07:18:12 +08:00
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; ALL: bb.2.cond.false:
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2017-12-05 01:18:51 +08:00
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; ALL: successors: %bb.3(0x80000000)
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2017-10-19 07:18:12 +08:00
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; ALL: bb.3.cond.end:
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2017-12-05 01:18:51 +08:00
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; ALL: [[PHI:%[0-9]+]]:_(s8) = G_PHI [[COPY1]](s8), %bb.1, [[COPY2]](s8), %bb.2
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2017-10-19 07:18:12 +08:00
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; ALL: %al = COPY [[PHI]](s8)
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; ALL: RET 0, implicit %al
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2017-09-04 17:06:45 +08:00
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bb.1.entry:
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2017-12-05 01:18:51 +08:00
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successors: %bb.2(0x40000000), %bb.3(0x40000000)
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2017-09-04 17:06:45 +08:00
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liveins: %edi, %edx, %esi
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%0(s32) = COPY %edi
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2017-09-17 16:30:42 +08:00
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%1(s8) = COPY %sil
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2017-09-04 17:06:45 +08:00
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%2(s8) = COPY %edx
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%3(s32) = G_CONSTANT i32 0
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%4(s1) = G_ICMP intpred(sgt), %0(s32), %3
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2017-12-05 01:18:51 +08:00
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G_BRCOND %4(s1), %bb.2
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G_BR %bb.3
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2017-09-04 17:06:45 +08:00
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bb.2.cond.true:
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2017-12-05 01:18:51 +08:00
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successors: %bb.4(0x80000000)
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2017-09-04 17:06:45 +08:00
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2017-12-05 01:18:51 +08:00
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G_BR %bb.4
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2017-09-04 17:06:45 +08:00
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bb.3.cond.false:
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2017-12-05 01:18:51 +08:00
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successors: %bb.4(0x80000000)
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2017-09-04 17:06:45 +08:00
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bb.4.cond.end:
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2017-12-05 01:18:51 +08:00
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%5(s8) = G_PHI %1(s8), %bb.2, %2(s8), %bb.3
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2017-09-04 17:06:45 +08:00
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%al = COPY %5(s8)
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RET 0, implicit %al
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...
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---
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name: test_i16
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alignment: 4
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legalized: false
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regBankSelected: false
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _, preferred-register: '' }
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- { id: 1, class: _, preferred-register: '' }
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- { id: 2, class: _, preferred-register: '' }
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- { id: 3, class: _, preferred-register: '' }
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- { id: 4, class: _, preferred-register: '' }
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- { id: 5, class: _, preferred-register: '' }
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liveins:
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fixedStack:
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stack:
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constants:
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2017-10-19 07:18:12 +08:00
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2017-09-04 17:06:45 +08:00
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body: |
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2017-10-19 07:18:12 +08:00
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; ALL-LABEL: name: test_i16
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2017-12-05 01:18:51 +08:00
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; ALL: bb.0.{{[a-zA-Z0-9]+}}:
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; ALL: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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2017-10-19 07:18:12 +08:00
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; ALL: liveins: %edi, %edx, %esi
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2017-10-25 02:04:54 +08:00
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; ALL: [[COPY:%[0-9]+]]:_(s32) = COPY %edi
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|
|
; ALL: [[COPY1:%[0-9]+]]:_(s16) = COPY %si
|
|
|
|
; ALL: [[COPY2:%[0-9]+]]:_(s16) = COPY %edx
|
|
|
|
; ALL: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
|
|
|
|
; ALL: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[COPY]](s32), [[C]]
|
2017-12-05 01:18:51 +08:00
|
|
|
; ALL: G_BRCOND [[ICMP]](s1), %bb.1
|
|
|
|
; ALL: G_BR %bb.2
|
2017-10-19 07:18:12 +08:00
|
|
|
; ALL: bb.1.cond.true:
|
2017-12-05 01:18:51 +08:00
|
|
|
; ALL: successors: %bb.3(0x80000000)
|
|
|
|
; ALL: G_BR %bb.3
|
2017-10-19 07:18:12 +08:00
|
|
|
; ALL: bb.2.cond.false:
|
2017-12-05 01:18:51 +08:00
|
|
|
; ALL: successors: %bb.3(0x80000000)
|
2017-10-19 07:18:12 +08:00
|
|
|
; ALL: bb.3.cond.end:
|
2017-12-05 01:18:51 +08:00
|
|
|
; ALL: [[PHI:%[0-9]+]]:_(s16) = G_PHI [[COPY1]](s16), %bb.1, [[COPY2]](s16), %bb.2
|
2017-10-19 07:18:12 +08:00
|
|
|
; ALL: %ax = COPY [[PHI]](s16)
|
|
|
|
; ALL: RET 0, implicit %ax
|
2017-09-04 17:06:45 +08:00
|
|
|
bb.1.entry:
|
2017-12-05 01:18:51 +08:00
|
|
|
successors: %bb.2(0x40000000), %bb.3(0x40000000)
|
2017-09-04 17:06:45 +08:00
|
|
|
liveins: %edi, %edx, %esi
|
|
|
|
|
|
|
|
%0(s32) = COPY %edi
|
2017-09-17 16:30:42 +08:00
|
|
|
%1(s16) = COPY %si
|
2017-09-04 17:06:45 +08:00
|
|
|
%2(s16) = COPY %edx
|
|
|
|
%3(s32) = G_CONSTANT i32 0
|
|
|
|
%4(s1) = G_ICMP intpred(sgt), %0(s32), %3
|
2017-12-05 01:18:51 +08:00
|
|
|
G_BRCOND %4(s1), %bb.2
|
|
|
|
G_BR %bb.3
|
2017-09-04 17:06:45 +08:00
|
|
|
|
|
|
|
bb.2.cond.true:
|
2017-12-05 01:18:51 +08:00
|
|
|
successors: %bb.4(0x80000000)
|
2017-09-04 17:06:45 +08:00
|
|
|
|
2017-12-05 01:18:51 +08:00
|
|
|
G_BR %bb.4
|
2017-09-04 17:06:45 +08:00
|
|
|
|
|
|
|
bb.3.cond.false:
|
2017-12-05 01:18:51 +08:00
|
|
|
successors: %bb.4(0x80000000)
|
2017-09-04 17:06:45 +08:00
|
|
|
|
|
|
|
|
|
|
|
bb.4.cond.end:
|
2017-12-05 01:18:51 +08:00
|
|
|
%5(s16) = G_PHI %1(s16), %bb.2, %2(s16), %bb.3
|
2017-09-04 17:06:45 +08:00
|
|
|
%ax = COPY %5(s16)
|
|
|
|
RET 0, implicit %ax
|
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: test_i32
|
|
|
|
alignment: 4
|
|
|
|
legalized: false
|
|
|
|
regBankSelected: false
|
|
|
|
tracksRegLiveness: true
|
|
|
|
registers:
|
|
|
|
- { id: 0, class: _, preferred-register: '' }
|
|
|
|
- { id: 1, class: _, preferred-register: '' }
|
|
|
|
- { id: 2, class: _, preferred-register: '' }
|
|
|
|
- { id: 3, class: _, preferred-register: '' }
|
|
|
|
- { id: 4, class: _, preferred-register: '' }
|
|
|
|
- { id: 5, class: _, preferred-register: '' }
|
|
|
|
liveins:
|
|
|
|
fixedStack:
|
|
|
|
stack:
|
|
|
|
constants:
|
2017-10-19 07:18:12 +08:00
|
|
|
|
|
|
|
|
|
|
|
|
2017-09-04 17:06:45 +08:00
|
|
|
body: |
|
2017-10-19 07:18:12 +08:00
|
|
|
; ALL-LABEL: name: test_i32
|
2017-12-05 01:18:51 +08:00
|
|
|
; ALL: bb.0.{{[a-zA-Z0-9]+}}:
|
|
|
|
; ALL: successors: %bb.1(0x40000000), %bb.2(0x40000000)
|
2017-10-19 07:18:12 +08:00
|
|
|
; ALL: liveins: %edi, %edx, %esi
|
2017-10-25 02:04:54 +08:00
|
|
|
; ALL: [[COPY:%[0-9]+]]:_(s32) = COPY %edi
|
|
|
|
; ALL: [[COPY1:%[0-9]+]]:_(s32) = COPY %esi
|
|
|
|
; ALL: [[COPY2:%[0-9]+]]:_(s32) = COPY %edx
|
|
|
|
; ALL: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
|
|
|
|
; ALL: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[COPY]](s32), [[C]]
|
2017-12-05 01:18:51 +08:00
|
|
|
; ALL: G_BRCOND [[ICMP]](s1), %bb.1
|
|
|
|
; ALL: G_BR %bb.2
|
2017-10-19 07:18:12 +08:00
|
|
|
; ALL: bb.1.cond.true:
|
2017-12-05 01:18:51 +08:00
|
|
|
; ALL: successors: %bb.3(0x80000000)
|
|
|
|
; ALL: G_BR %bb.3
|
2017-10-19 07:18:12 +08:00
|
|
|
; ALL: bb.2.cond.false:
|
2017-12-05 01:18:51 +08:00
|
|
|
; ALL: successors: %bb.3(0x80000000)
|
2017-10-19 07:18:12 +08:00
|
|
|
; ALL: bb.3.cond.end:
|
2017-12-05 01:18:51 +08:00
|
|
|
; ALL: [[PHI:%[0-9]+]]:_(s32) = G_PHI [[COPY1]](s32), %bb.1, [[COPY2]](s32), %bb.2
|
2017-10-19 07:18:12 +08:00
|
|
|
; ALL: %eax = COPY [[PHI]](s32)
|
|
|
|
; ALL: RET 0, implicit %eax
|
2017-09-04 17:06:45 +08:00
|
|
|
bb.1.entry:
|
2017-12-05 01:18:51 +08:00
|
|
|
successors: %bb.2(0x40000000), %bb.3(0x40000000)
|
2017-09-04 17:06:45 +08:00
|
|
|
liveins: %edi, %edx, %esi
|
|
|
|
|
|
|
|
%0(s32) = COPY %edi
|
|
|
|
%1(s32) = COPY %esi
|
|
|
|
%2(s32) = COPY %edx
|
|
|
|
%3(s32) = G_CONSTANT i32 0
|
|
|
|
%4(s1) = G_ICMP intpred(sgt), %0(s32), %3
|
2017-12-05 01:18:51 +08:00
|
|
|
G_BRCOND %4(s1), %bb.2
|
|
|
|
G_BR %bb.3
|
2017-09-04 17:06:45 +08:00
|
|
|
|
|
|
|
bb.2.cond.true:
|
2017-12-05 01:18:51 +08:00
|
|
|
successors: %bb.4(0x80000000)
|
2017-09-04 17:06:45 +08:00
|
|
|
|
2017-12-05 01:18:51 +08:00
|
|
|
G_BR %bb.4
|
2017-09-04 17:06:45 +08:00
|
|
|
|
|
|
|
bb.3.cond.false:
|
2017-12-05 01:18:51 +08:00
|
|
|
successors: %bb.4(0x80000000)
|
2017-09-04 17:06:45 +08:00
|
|
|
|
|
|
|
|
|
|
|
bb.4.cond.end:
|
2017-12-05 01:18:51 +08:00
|
|
|
%5(s32) = G_PHI %1(s32), %bb.2, %2(s32), %bb.3
|
2017-09-04 17:06:45 +08:00
|
|
|
%eax = COPY %5(s32)
|
|
|
|
RET 0, implicit %eax
|
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: test_i64
|
|
|
|
alignment: 4
|
|
|
|
legalized: false
|
|
|
|
regBankSelected: false
|
|
|
|
tracksRegLiveness: true
|
|
|
|
registers:
|
|
|
|
- { id: 0, class: _, preferred-register: '' }
|
|
|
|
- { id: 1, class: _, preferred-register: '' }
|
|
|
|
- { id: 2, class: _, preferred-register: '' }
|
|
|
|
- { id: 3, class: _, preferred-register: '' }
|
|
|
|
- { id: 4, class: _, preferred-register: '' }
|
|
|
|
- { id: 5, class: _, preferred-register: '' }
|
|
|
|
liveins:
|
|
|
|
fixedStack:
|
|
|
|
stack:
|
|
|
|
constants:
|
2017-10-19 07:18:12 +08:00
|
|
|
|
|
|
|
|
|
|
|
|
2017-09-04 17:06:45 +08:00
|
|
|
body: |
|
2017-10-19 07:18:12 +08:00
|
|
|
; ALL-LABEL: name: test_i64
|
2017-12-05 01:18:51 +08:00
|
|
|
; ALL: bb.0.{{[a-zA-Z0-9]+}}:
|
|
|
|
; ALL: successors: %bb.1(0x40000000), %bb.2(0x40000000)
|
2017-10-19 07:18:12 +08:00
|
|
|
; ALL: liveins: %edi, %rdx, %rsi
|
2017-10-25 02:04:54 +08:00
|
|
|
; ALL: [[COPY:%[0-9]+]]:_(s32) = COPY %edi
|
|
|
|
; ALL: [[COPY1:%[0-9]+]]:_(s64) = COPY %rsi
|
|
|
|
; ALL: [[COPY2:%[0-9]+]]:_(s64) = COPY %rdx
|
|
|
|
; ALL: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
|
|
|
|
; ALL: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[COPY]](s32), [[C]]
|
2017-12-05 01:18:51 +08:00
|
|
|
; ALL: G_BRCOND [[ICMP]](s1), %bb.1
|
|
|
|
; ALL: G_BR %bb.2
|
2017-10-19 07:18:12 +08:00
|
|
|
; ALL: bb.1.cond.true:
|
2017-12-05 01:18:51 +08:00
|
|
|
; ALL: successors: %bb.3(0x80000000)
|
|
|
|
; ALL: G_BR %bb.3
|
2017-10-19 07:18:12 +08:00
|
|
|
; ALL: bb.2.cond.false:
|
2017-12-05 01:18:51 +08:00
|
|
|
; ALL: successors: %bb.3(0x80000000)
|
2017-10-19 07:18:12 +08:00
|
|
|
; ALL: bb.3.cond.end:
|
2017-12-05 01:18:51 +08:00
|
|
|
; ALL: [[PHI:%[0-9]+]]:_(s64) = G_PHI [[COPY1]](s64), %bb.1, [[COPY2]](s64), %bb.2
|
2017-10-19 07:18:12 +08:00
|
|
|
; ALL: %rax = COPY [[PHI]](s64)
|
|
|
|
; ALL: RET 0, implicit %rax
|
2017-09-04 17:06:45 +08:00
|
|
|
bb.1.entry:
|
2017-12-05 01:18:51 +08:00
|
|
|
successors: %bb.2(0x40000000), %bb.3(0x40000000)
|
2017-09-04 17:06:45 +08:00
|
|
|
liveins: %edi, %rdx, %rsi
|
|
|
|
|
|
|
|
%0(s32) = COPY %edi
|
|
|
|
%1(s64) = COPY %rsi
|
|
|
|
%2(s64) = COPY %rdx
|
|
|
|
%3(s32) = G_CONSTANT i32 0
|
|
|
|
%4(s1) = G_ICMP intpred(sgt), %0(s32), %3
|
2017-12-05 01:18:51 +08:00
|
|
|
G_BRCOND %4(s1), %bb.2
|
|
|
|
G_BR %bb.3
|
2017-09-04 17:06:45 +08:00
|
|
|
|
|
|
|
bb.2.cond.true:
|
2017-12-05 01:18:51 +08:00
|
|
|
successors: %bb.4(0x80000000)
|
2017-09-04 17:06:45 +08:00
|
|
|
|
2017-12-05 01:18:51 +08:00
|
|
|
G_BR %bb.4
|
2017-09-04 17:06:45 +08:00
|
|
|
|
|
|
|
bb.3.cond.false:
|
2017-12-05 01:18:51 +08:00
|
|
|
successors: %bb.4(0x80000000)
|
2017-09-04 17:06:45 +08:00
|
|
|
|
|
|
|
|
|
|
|
bb.4.cond.end:
|
2017-12-05 01:18:51 +08:00
|
|
|
%5(s64) = G_PHI %1(s64), %bb.2, %2(s64), %bb.3
|
2017-09-04 17:06:45 +08:00
|
|
|
%rax = COPY %5(s64)
|
|
|
|
RET 0, implicit %rax
|
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: test_float
|
|
|
|
alignment: 4
|
|
|
|
legalized: false
|
|
|
|
regBankSelected: false
|
|
|
|
tracksRegLiveness: true
|
|
|
|
registers:
|
|
|
|
- { id: 0, class: _, preferred-register: '' }
|
|
|
|
- { id: 1, class: _, preferred-register: '' }
|
|
|
|
- { id: 2, class: _, preferred-register: '' }
|
|
|
|
- { id: 3, class: _, preferred-register: '' }
|
|
|
|
- { id: 4, class: _, preferred-register: '' }
|
|
|
|
- { id: 5, class: _, preferred-register: '' }
|
|
|
|
liveins:
|
|
|
|
fixedStack:
|
|
|
|
stack:
|
|
|
|
constants:
|
2017-10-19 07:18:12 +08:00
|
|
|
|
|
|
|
|
|
|
|
|
2017-09-04 17:06:45 +08:00
|
|
|
body: |
|
2017-10-19 07:18:12 +08:00
|
|
|
; ALL-LABEL: name: test_float
|
2017-12-05 01:18:51 +08:00
|
|
|
; ALL: bb.0.{{[a-zA-Z0-9]+}}:
|
|
|
|
; ALL: successors: %bb.1(0x40000000), %bb.2(0x40000000)
|
2017-10-19 07:18:12 +08:00
|
|
|
; ALL: liveins: %edi, %xmm0, %xmm1
|
2017-10-25 02:04:54 +08:00
|
|
|
; ALL: [[COPY:%[0-9]+]]:_(s32) = COPY %edi
|
|
|
|
; ALL: [[COPY1:%[0-9]+]]:_(s32) = COPY %xmm0
|
|
|
|
; ALL: [[COPY2:%[0-9]+]]:_(s32) = COPY %xmm1
|
|
|
|
; ALL: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
|
|
|
|
; ALL: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[COPY]](s32), [[C]]
|
2017-12-05 01:18:51 +08:00
|
|
|
; ALL: G_BRCOND [[ICMP]](s1), %bb.1
|
|
|
|
; ALL: G_BR %bb.2
|
2017-10-19 07:18:12 +08:00
|
|
|
; ALL: bb.1.cond.true:
|
2017-12-05 01:18:51 +08:00
|
|
|
; ALL: successors: %bb.3(0x80000000)
|
|
|
|
; ALL: G_BR %bb.3
|
2017-10-19 07:18:12 +08:00
|
|
|
; ALL: bb.2.cond.false:
|
2017-12-05 01:18:51 +08:00
|
|
|
; ALL: successors: %bb.3(0x80000000)
|
2017-10-19 07:18:12 +08:00
|
|
|
; ALL: bb.3.cond.end:
|
2017-12-05 01:18:51 +08:00
|
|
|
; ALL: [[PHI:%[0-9]+]]:_(s32) = G_PHI [[COPY1]](s32), %bb.1, [[COPY2]](s32), %bb.2
|
2017-10-19 07:18:12 +08:00
|
|
|
; ALL: %xmm0 = COPY [[PHI]](s32)
|
|
|
|
; ALL: RET 0, implicit %xmm0
|
2017-09-04 17:06:45 +08:00
|
|
|
bb.1.entry:
|
2017-12-05 01:18:51 +08:00
|
|
|
successors: %bb.2(0x40000000), %bb.3(0x40000000)
|
2017-09-04 17:06:45 +08:00
|
|
|
liveins: %edi, %xmm0, %xmm1
|
|
|
|
|
|
|
|
%0(s32) = COPY %edi
|
|
|
|
%1(s32) = COPY %xmm0
|
|
|
|
%2(s32) = COPY %xmm1
|
|
|
|
%3(s32) = G_CONSTANT i32 0
|
|
|
|
%4(s1) = G_ICMP intpred(sgt), %0(s32), %3
|
2017-12-05 01:18:51 +08:00
|
|
|
G_BRCOND %4(s1), %bb.2
|
|
|
|
G_BR %bb.3
|
2017-09-04 17:06:45 +08:00
|
|
|
|
|
|
|
bb.2.cond.true:
|
2017-12-05 01:18:51 +08:00
|
|
|
successors: %bb.4(0x80000000)
|
2017-09-04 17:06:45 +08:00
|
|
|
|
2017-12-05 01:18:51 +08:00
|
|
|
G_BR %bb.4
|
2017-09-04 17:06:45 +08:00
|
|
|
|
|
|
|
bb.3.cond.false:
|
2017-12-05 01:18:51 +08:00
|
|
|
successors: %bb.4(0x80000000)
|
2017-09-04 17:06:45 +08:00
|
|
|
|
|
|
|
|
|
|
|
bb.4.cond.end:
|
2017-12-05 01:18:51 +08:00
|
|
|
%5(s32) = G_PHI %1(s32), %bb.2, %2(s32), %bb.3
|
2017-09-04 17:06:45 +08:00
|
|
|
%xmm0 = COPY %5(s32)
|
|
|
|
RET 0, implicit %xmm0
|
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: test_double
|
|
|
|
alignment: 4
|
|
|
|
legalized: false
|
|
|
|
regBankSelected: false
|
|
|
|
tracksRegLiveness: true
|
|
|
|
registers:
|
|
|
|
- { id: 0, class: _, preferred-register: '' }
|
|
|
|
- { id: 1, class: _, preferred-register: '' }
|
|
|
|
- { id: 2, class: _, preferred-register: '' }
|
|
|
|
- { id: 3, class: _, preferred-register: '' }
|
|
|
|
- { id: 4, class: _, preferred-register: '' }
|
|
|
|
- { id: 5, class: _, preferred-register: '' }
|
|
|
|
liveins:
|
|
|
|
fixedStack:
|
|
|
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stack:
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constants:
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2017-10-19 07:18:12 +08:00
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2017-09-04 17:06:45 +08:00
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body: |
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2017-10-19 07:18:12 +08:00
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; ALL-LABEL: name: test_double
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2017-12-05 01:18:51 +08:00
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; ALL: bb.0.{{[a-zA-Z0-9]+}}:
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; ALL: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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2017-10-19 07:18:12 +08:00
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; ALL: liveins: %edi, %xmm0, %xmm1
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2017-10-25 02:04:54 +08:00
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; ALL: [[COPY:%[0-9]+]]:_(s32) = COPY %edi
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; ALL: [[COPY1:%[0-9]+]]:_(s64) = COPY %xmm0
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; ALL: [[COPY2:%[0-9]+]]:_(s64) = COPY %xmm1
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; ALL: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; ALL: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[COPY]](s32), [[C]]
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2017-12-05 01:18:51 +08:00
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; ALL: G_BRCOND [[ICMP]](s1), %bb.1
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; ALL: G_BR %bb.2
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2017-10-19 07:18:12 +08:00
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; ALL: bb.1.cond.true:
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2017-12-05 01:18:51 +08:00
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; ALL: successors: %bb.3(0x80000000)
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; ALL: G_BR %bb.3
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2017-10-19 07:18:12 +08:00
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; ALL: bb.2.cond.false:
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2017-12-05 01:18:51 +08:00
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; ALL: successors: %bb.3(0x80000000)
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2017-10-19 07:18:12 +08:00
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; ALL: bb.3.cond.end:
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2017-12-05 01:18:51 +08:00
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; ALL: [[PHI:%[0-9]+]]:_(s64) = G_PHI [[COPY1]](s64), %bb.1, [[COPY2]](s64), %bb.2
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2017-10-19 07:18:12 +08:00
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; ALL: %xmm0 = COPY [[PHI]](s64)
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; ALL: RET 0, implicit %xmm0
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2017-09-04 17:06:45 +08:00
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bb.1.entry:
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2017-12-05 01:18:51 +08:00
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successors: %bb.2(0x40000000), %bb.3(0x40000000)
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2017-09-04 17:06:45 +08:00
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liveins: %edi, %xmm0, %xmm1
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%0(s32) = COPY %edi
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%1(s64) = COPY %xmm0
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%2(s64) = COPY %xmm1
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%3(s32) = G_CONSTANT i32 0
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%4(s1) = G_ICMP intpred(sgt), %0(s32), %3
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2017-12-05 01:18:51 +08:00
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G_BRCOND %4(s1), %bb.2
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G_BR %bb.3
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2017-09-04 17:06:45 +08:00
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bb.2.cond.true:
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2017-12-05 01:18:51 +08:00
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successors: %bb.4(0x80000000)
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2017-09-04 17:06:45 +08:00
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2017-12-05 01:18:51 +08:00
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G_BR %bb.4
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2017-09-04 17:06:45 +08:00
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bb.3.cond.false:
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2017-12-05 01:18:51 +08:00
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successors: %bb.4(0x80000000)
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2017-09-04 17:06:45 +08:00
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bb.4.cond.end:
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2017-12-05 01:18:51 +08:00
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%5(s64) = G_PHI %1(s64), %bb.2, %2(s64), %bb.3
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2017-09-04 17:06:45 +08:00
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%xmm0 = COPY %5(s64)
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RET 0, implicit %xmm0
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...
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