forked from OSchip/llvm-project
35 lines
1.3 KiB
LLVM
35 lines
1.3 KiB
LLVM
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; Test that the updated regmask on the call to @fun1 preserves %r14 and
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; %15. @fun1 will save and restore these registers since it contains a call.
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;
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; RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 -enable-ipra -print-regmask-num-regs=-1 \
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; RUN: -debug-only=ip-regalloc 2>&1 < %s | FileCheck --check-prefix=DBG %s
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; REQUIRES: asserts
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;
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; DBG: fun1 function optimized for not having CSR
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; DBG: Call Instruction After Register Usage Info Propagation : CallBRASL @fun1{{.*}} $r14d $r15d
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declare dso_local fastcc signext i32 @foo(i16*, i32 signext) unnamed_addr
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define internal fastcc void @fun1(i16* %arg, i16* nocapture %arg1) unnamed_addr #0 {
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bb:
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%tmp = load i16, i16* undef, align 2
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%tmp2 = shl i16 %tmp, 4
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%tmp3 = tail call fastcc signext i32 @foo(i16* nonnull %arg, i32 signext 5)
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%tmp4 = or i16 0, %tmp2
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%tmp5 = or i16 %tmp4, 0
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store i16 %tmp5, i16* undef, align 2
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%tmp6 = getelementptr inbounds i16, i16* %arg, i64 5
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%tmp7 = load i16, i16* %tmp6, align 2
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store i16 %tmp7, i16* %arg1, align 2
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ret void
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}
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define fastcc void @fun0(i8* nocapture readonly %arg, i16* nocapture %arg1, i32 signext %arg2) unnamed_addr {
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bb:
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%a = alloca i8, i64 undef
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call fastcc void @fun1(i16* nonnull undef, i16* %arg1)
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ret void
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}
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attributes #0 = { norecurse nounwind "no-frame-pointer-elim"="false" }
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