2017-03-22 20:03:56 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
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define i16 @test_mul_by_1(i16 %x) {
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; X86-LABEL: test_mul_by_1:
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; X86: # BB#0:
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; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: retl
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;
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; X64-LABEL: test_mul_by_1:
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; X64: # BB#0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: retq
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%mul = mul nsw i16 %x, 1
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ret i16 %mul
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}
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define i16 @test_mul_by_2(i16 %x) {
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; X86-LABEL: test_mul_by_2:
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; X86: # BB#0:
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; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: addl %eax, %eax
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2017-11-29 01:15:09 +08:00
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; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
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2017-03-22 20:03:56 +08:00
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; X86-NEXT: retl
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;
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; X64-LABEL: test_mul_by_2:
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; X64: # BB#0:
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2017-11-29 01:15:09 +08:00
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; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
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2017-03-22 20:03:56 +08:00
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; X64-NEXT: leal (%rdi,%rdi), %eax
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2017-11-29 01:15:09 +08:00
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; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
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2017-03-22 20:03:56 +08:00
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; X64-NEXT: retq
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%mul = mul nsw i16 %x, 2
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ret i16 %mul
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}
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define i16 @test_mul_by_3(i16 %x) {
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; X86-LABEL: test_mul_by_3:
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; X86: # BB#0:
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; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: leal (%eax,%eax,2), %eax
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2017-11-29 01:15:09 +08:00
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; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
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2017-03-22 20:03:56 +08:00
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; X86-NEXT: retl
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;
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; X64-LABEL: test_mul_by_3:
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; X64: # BB#0:
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2017-11-29 01:15:09 +08:00
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; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
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2017-03-22 20:03:56 +08:00
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; X64-NEXT: leal (%rdi,%rdi,2), %eax
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2017-11-29 01:15:09 +08:00
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; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
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2017-03-22 20:03:56 +08:00
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; X64-NEXT: retq
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%mul = mul nsw i16 %x, 3
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ret i16 %mul
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}
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define i16 @test_mul_by_4(i16 %x) {
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; X86-LABEL: test_mul_by_4:
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; X86: # BB#0:
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; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: shll $2, %eax
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2017-11-29 01:15:09 +08:00
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; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
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2017-03-22 20:03:56 +08:00
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; X86-NEXT: retl
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;
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; X64-LABEL: test_mul_by_4:
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; X64: # BB#0:
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2017-11-29 01:15:09 +08:00
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; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
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2017-03-22 20:03:56 +08:00
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; X64-NEXT: leal (,%rdi,4), %eax
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2017-11-29 01:15:09 +08:00
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; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
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2017-03-22 20:03:56 +08:00
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; X64-NEXT: retq
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%mul = mul nsw i16 %x, 4
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ret i16 %mul
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}
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define i16 @test_mul_by_5(i16 %x) {
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; X86-LABEL: test_mul_by_5:
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; X86: # BB#0:
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; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: leal (%eax,%eax,4), %eax
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2017-11-29 01:15:09 +08:00
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; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
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2017-03-22 20:03:56 +08:00
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; X86-NEXT: retl
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;
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; X64-LABEL: test_mul_by_5:
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; X64: # BB#0:
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2017-11-29 01:15:09 +08:00
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; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
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2017-03-22 20:03:56 +08:00
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; X64-NEXT: leal (%rdi,%rdi,4), %eax
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2017-11-29 01:15:09 +08:00
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; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
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2017-03-22 20:03:56 +08:00
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; X64-NEXT: retq
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%mul = mul nsw i16 %x, 5
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ret i16 %mul
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}
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define i16 @test_mul_by_6(i16 %x) {
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; X86-LABEL: test_mul_by_6:
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; X86: # BB#0:
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; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: addl %eax, %eax
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; X86-NEXT: leal (%eax,%eax,2), %eax
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2017-11-29 01:15:09 +08:00
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; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
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2017-03-22 20:03:56 +08:00
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; X86-NEXT: retl
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;
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; X64-LABEL: test_mul_by_6:
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; X64: # BB#0:
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2017-11-29 01:15:09 +08:00
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; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
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2017-03-22 20:03:56 +08:00
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; X64-NEXT: addl %edi, %edi
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; X64-NEXT: leal (%rdi,%rdi,2), %eax
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2017-11-29 01:15:09 +08:00
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; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
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2017-03-22 20:03:56 +08:00
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|
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; X64-NEXT: retq
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%mul = mul nsw i16 %x, 6
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ret i16 %mul
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}
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define i16 @test_mul_by_7(i16 %x) {
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; X86-LABEL: test_mul_by_7:
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; X86: # BB#0:
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; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: leal (,%ecx,8), %eax
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; X86-NEXT: subl %ecx, %eax
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2017-11-29 01:15:09 +08:00
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; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
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2017-03-22 20:03:56 +08:00
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; X86-NEXT: retl
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;
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; X64-LABEL: test_mul_by_7:
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; X64: # BB#0:
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2017-11-29 01:15:09 +08:00
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; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
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2017-03-22 20:03:56 +08:00
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; X64-NEXT: leal (,%rdi,8), %eax
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; X64-NEXT: subl %edi, %eax
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2017-11-29 01:15:09 +08:00
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; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
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2017-03-22 20:03:56 +08:00
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; X64-NEXT: retq
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%mul = mul nsw i16 %x, 7
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ret i16 %mul
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}
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define i16 @test_mul_by_8(i16 %x) {
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; X86-LABEL: test_mul_by_8:
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; X86: # BB#0:
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; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: shll $3, %eax
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2017-11-29 01:15:09 +08:00
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; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
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2017-03-22 20:03:56 +08:00
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; X86-NEXT: retl
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;
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; X64-LABEL: test_mul_by_8:
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; X64: # BB#0:
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2017-11-29 01:15:09 +08:00
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; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
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2017-03-22 20:03:56 +08:00
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; X64-NEXT: leal (,%rdi,8), %eax
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2017-11-29 01:15:09 +08:00
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; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
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2017-03-22 20:03:56 +08:00
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; X64-NEXT: retq
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%mul = mul nsw i16 %x, 8
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ret i16 %mul
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}
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define i16 @test_mul_by_9(i16 %x) {
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; X86-LABEL: test_mul_by_9:
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; X86: # BB#0:
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; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: leal (%eax,%eax,8), %eax
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2017-11-29 01:15:09 +08:00
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; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
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; X86-NEXT: retl
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;
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; X64-LABEL: test_mul_by_9:
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|
|
; X64: # BB#0:
|
2017-11-29 01:15:09 +08:00
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; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
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2017-03-22 20:03:56 +08:00
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|
; X64-NEXT: leal (%rdi,%rdi,8), %eax
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2017-11-29 01:15:09 +08:00
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; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
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; X64-NEXT: retq
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%mul = mul nsw i16 %x, 9
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ret i16 %mul
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}
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define i16 @test_mul_by_10(i16 %x) {
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; X86-LABEL: test_mul_by_10:
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; X86: # BB#0:
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; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: addl %eax, %eax
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; X86-NEXT: leal (%eax,%eax,4), %eax
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2017-11-29 01:15:09 +08:00
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; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
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; X86-NEXT: retl
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;
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|
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; X64-LABEL: test_mul_by_10:
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|
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; X64: # BB#0:
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2017-11-29 01:15:09 +08:00
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; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
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2017-03-22 20:03:56 +08:00
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; X64-NEXT: addl %edi, %edi
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; X64-NEXT: leal (%rdi,%rdi,4), %eax
|
2017-11-29 01:15:09 +08:00
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; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
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2017-03-22 20:03:56 +08:00
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; X64-NEXT: retq
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%mul = mul nsw i16 %x, 10
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ret i16 %mul
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}
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define i16 @test_mul_by_11(i16 %x) {
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; X86-LABEL: test_mul_by_11:
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; X86: # BB#0:
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; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
|
2017-06-08 18:20:13 +08:00
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; X86-NEXT: leal (%eax,%eax,4), %ecx
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; X86-NEXT: leal (%eax,%ecx,2), %eax
|
2017-11-29 01:15:09 +08:00
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; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
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; X86-NEXT: retl
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;
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; X64-LABEL: test_mul_by_11:
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; X64: # BB#0:
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2017-11-29 01:15:09 +08:00
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; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
|
2017-06-08 18:20:13 +08:00
|
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; X64-NEXT: leal (%rdi,%rdi,4), %eax
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; X64-NEXT: leal (%rdi,%rax,2), %eax
|
2017-11-29 01:15:09 +08:00
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; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
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; X64-NEXT: retq
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|
%mul = mul nsw i16 %x, 11
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|
ret i16 %mul
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|
|
}
|
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|
define i16 @test_mul_by_12(i16 %x) {
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|
|
; X86-LABEL: test_mul_by_12:
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|
|
|
; X86: # BB#0:
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|
|
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
|
|
|
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; X86-NEXT: shll $2, %eax
|
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|
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; X86-NEXT: leal (%eax,%eax,2), %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
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|
; X86-NEXT: retl
|
|
|
|
;
|
|
|
|
; X64-LABEL: test_mul_by_12:
|
|
|
|
; X64: # BB#0:
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X64-NEXT: shll $2, %edi
|
|
|
|
; X64-NEXT: leal (%rdi,%rdi,2), %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X64-NEXT: retq
|
|
|
|
%mul = mul nsw i16 %x, 12
|
|
|
|
ret i16 %mul
|
|
|
|
}
|
|
|
|
|
|
|
|
define i16 @test_mul_by_13(i16 %x) {
|
|
|
|
; X86-LABEL: test_mul_by_13:
|
|
|
|
; X86: # BB#0:
|
|
|
|
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
|
2017-06-08 18:20:13 +08:00
|
|
|
; X86-NEXT: leal (%eax,%eax,2), %ecx
|
|
|
|
; X86-NEXT: leal (%eax,%ecx,4), %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X86-NEXT: retl
|
|
|
|
;
|
|
|
|
; X64-LABEL: test_mul_by_13:
|
|
|
|
; X64: # BB#0:
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
|
2017-06-08 18:20:13 +08:00
|
|
|
; X64-NEXT: leal (%rdi,%rdi,2), %eax
|
|
|
|
; X64-NEXT: leal (%rdi,%rax,4), %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X64-NEXT: retq
|
|
|
|
%mul = mul nsw i16 %x, 13
|
|
|
|
ret i16 %mul
|
|
|
|
}
|
|
|
|
|
|
|
|
define i16 @test_mul_by_14(i16 %x) {
|
|
|
|
; X86-LABEL: test_mul_by_14:
|
|
|
|
; X86: # BB#0:
|
2017-06-08 18:20:13 +08:00
|
|
|
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
|
|
|
|
; X86-NEXT: leal (%ecx,%ecx,2), %eax
|
|
|
|
; X86-NEXT: leal (%ecx,%eax,4), %eax
|
|
|
|
; X86-NEXT: addl %ecx, %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X86-NEXT: retl
|
|
|
|
;
|
|
|
|
; X64-LABEL: test_mul_by_14:
|
|
|
|
; X64: # BB#0:
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
|
2017-06-08 18:20:13 +08:00
|
|
|
; X64-NEXT: leal (%rdi,%rdi,2), %eax
|
|
|
|
; X64-NEXT: leal (%rdi,%rax,4), %eax
|
|
|
|
; X64-NEXT: addl %edi, %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X64-NEXT: retq
|
|
|
|
%mul = mul nsw i16 %x, 14
|
|
|
|
ret i16 %mul
|
|
|
|
}
|
|
|
|
|
|
|
|
define i16 @test_mul_by_15(i16 %x) {
|
|
|
|
; X86-LABEL: test_mul_by_15:
|
|
|
|
; X86: # BB#0:
|
|
|
|
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
|
|
|
|
; X86-NEXT: leal (%eax,%eax,4), %eax
|
|
|
|
; X86-NEXT: leal (%eax,%eax,2), %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X86-NEXT: retl
|
|
|
|
;
|
|
|
|
; X64-LABEL: test_mul_by_15:
|
|
|
|
; X64: # BB#0:
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X64-NEXT: leal (%rdi,%rdi,4), %eax
|
|
|
|
; X64-NEXT: leal (%rax,%rax,2), %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X64-NEXT: retq
|
|
|
|
%mul = mul nsw i16 %x, 15
|
|
|
|
ret i16 %mul
|
|
|
|
}
|
|
|
|
|
|
|
|
define i16 @test_mul_by_16(i16 %x) {
|
|
|
|
; X86-LABEL: test_mul_by_16:
|
|
|
|
; X86: # BB#0:
|
|
|
|
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
|
|
|
|
; X86-NEXT: shll $4, %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X86-NEXT: retl
|
|
|
|
;
|
|
|
|
; X64-LABEL: test_mul_by_16:
|
|
|
|
; X64: # BB#0:
|
|
|
|
; X64-NEXT: shll $4, %edi
|
|
|
|
; X64-NEXT: movl %edi, %eax
|
|
|
|
; X64-NEXT: retq
|
|
|
|
%mul = mul nsw i16 %x, 16
|
|
|
|
ret i16 %mul
|
|
|
|
}
|
|
|
|
|
|
|
|
define i16 @test_mul_by_17(i16 %x) {
|
|
|
|
; X86-LABEL: test_mul_by_17:
|
|
|
|
; X86: # BB#0:
|
|
|
|
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
|
|
|
|
; X86-NEXT: movl %ecx, %eax
|
|
|
|
; X86-NEXT: shll $4, %eax
|
|
|
|
; X86-NEXT: addl %ecx, %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X86-NEXT: retl
|
|
|
|
;
|
|
|
|
; X64-LABEL: test_mul_by_17:
|
|
|
|
; X64: # BB#0:
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X64-NEXT: movl %edi, %eax
|
|
|
|
; X64-NEXT: shll $4, %eax
|
|
|
|
; X64-NEXT: leal (%rax,%rdi), %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X64-NEXT: retq
|
|
|
|
%mul = mul nsw i16 %x, 17
|
|
|
|
ret i16 %mul
|
|
|
|
}
|
|
|
|
|
|
|
|
define i16 @test_mul_by_18(i16 %x) {
|
|
|
|
; X86-LABEL: test_mul_by_18:
|
|
|
|
; X86: # BB#0:
|
|
|
|
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
|
|
|
|
; X86-NEXT: addl %eax, %eax
|
|
|
|
; X86-NEXT: leal (%eax,%eax,8), %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X86-NEXT: retl
|
|
|
|
;
|
|
|
|
; X64-LABEL: test_mul_by_18:
|
|
|
|
; X64: # BB#0:
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X64-NEXT: addl %edi, %edi
|
|
|
|
; X64-NEXT: leal (%rdi,%rdi,8), %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X64-NEXT: retq
|
|
|
|
%mul = mul nsw i16 %x, 18
|
|
|
|
ret i16 %mul
|
|
|
|
}
|
|
|
|
|
|
|
|
define i16 @test_mul_by_19(i16 %x) {
|
|
|
|
; X86-LABEL: test_mul_by_19:
|
|
|
|
; X86: # BB#0:
|
2017-06-08 18:20:13 +08:00
|
|
|
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
|
|
|
|
; X86-NEXT: leal (%ecx,%ecx,4), %eax
|
|
|
|
; X86-NEXT: shll $2, %eax
|
|
|
|
; X86-NEXT: subl %ecx, %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X86-NEXT: retl
|
|
|
|
;
|
|
|
|
; X64-LABEL: test_mul_by_19:
|
|
|
|
; X64: # BB#0:
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
|
2017-06-08 18:20:13 +08:00
|
|
|
; X64-NEXT: leal (%rdi,%rdi,4), %eax
|
|
|
|
; X64-NEXT: shll $2, %eax
|
|
|
|
; X64-NEXT: subl %edi, %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X64-NEXT: retq
|
|
|
|
%mul = mul nsw i16 %x, 19
|
|
|
|
ret i16 %mul
|
|
|
|
}
|
|
|
|
|
|
|
|
define i16 @test_mul_by_20(i16 %x) {
|
|
|
|
; X86-LABEL: test_mul_by_20:
|
|
|
|
; X86: # BB#0:
|
|
|
|
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
|
|
|
|
; X86-NEXT: shll $2, %eax
|
|
|
|
; X86-NEXT: leal (%eax,%eax,4), %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X86-NEXT: retl
|
|
|
|
;
|
|
|
|
; X64-LABEL: test_mul_by_20:
|
|
|
|
; X64: # BB#0:
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X64-NEXT: shll $2, %edi
|
|
|
|
; X64-NEXT: leal (%rdi,%rdi,4), %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X64-NEXT: retq
|
|
|
|
%mul = mul nsw i16 %x, 20
|
|
|
|
ret i16 %mul
|
|
|
|
}
|
|
|
|
|
|
|
|
define i16 @test_mul_by_21(i16 %x) {
|
|
|
|
; X86-LABEL: test_mul_by_21:
|
|
|
|
; X86: # BB#0:
|
|
|
|
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
|
2017-06-08 18:20:13 +08:00
|
|
|
; X86-NEXT: leal (%eax,%eax,4), %ecx
|
|
|
|
; X86-NEXT: leal (%eax,%ecx,4), %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X86-NEXT: retl
|
|
|
|
;
|
|
|
|
; X64-LABEL: test_mul_by_21:
|
|
|
|
; X64: # BB#0:
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
|
2017-06-08 18:20:13 +08:00
|
|
|
; X64-NEXT: leal (%rdi,%rdi,4), %eax
|
|
|
|
; X64-NEXT: leal (%rdi,%rax,4), %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X64-NEXT: retq
|
|
|
|
%mul = mul nsw i16 %x, 21
|
|
|
|
ret i16 %mul
|
|
|
|
}
|
|
|
|
|
|
|
|
define i16 @test_mul_by_22(i16 %x) {
|
|
|
|
; X86-LABEL: test_mul_by_22:
|
|
|
|
; X86: # BB#0:
|
2017-06-08 18:20:13 +08:00
|
|
|
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
|
|
|
|
; X86-NEXT: leal (%ecx,%ecx,4), %eax
|
|
|
|
; X86-NEXT: leal (%ecx,%eax,4), %eax
|
|
|
|
; X86-NEXT: addl %ecx, %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X86-NEXT: retl
|
|
|
|
;
|
|
|
|
; X64-LABEL: test_mul_by_22:
|
|
|
|
; X64: # BB#0:
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
|
2017-06-08 18:20:13 +08:00
|
|
|
; X64-NEXT: leal (%rdi,%rdi,4), %eax
|
|
|
|
; X64-NEXT: leal (%rdi,%rax,4), %eax
|
|
|
|
; X64-NEXT: addl %edi, %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X64-NEXT: retq
|
|
|
|
%mul = mul nsw i16 %x, 22
|
|
|
|
ret i16 %mul
|
|
|
|
}
|
|
|
|
|
|
|
|
define i16 @test_mul_by_23(i16 %x) {
|
|
|
|
; X86-LABEL: test_mul_by_23:
|
|
|
|
; X86: # BB#0:
|
2017-06-08 18:20:13 +08:00
|
|
|
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
|
|
|
|
; X86-NEXT: leal (%ecx,%ecx,2), %eax
|
|
|
|
; X86-NEXT: shll $3, %eax
|
|
|
|
; X86-NEXT: subl %ecx, %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X86-NEXT: retl
|
|
|
|
;
|
|
|
|
; X64-LABEL: test_mul_by_23:
|
|
|
|
; X64: # BB#0:
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
|
2017-06-08 18:20:13 +08:00
|
|
|
; X64-NEXT: leal (%rdi,%rdi,2), %eax
|
|
|
|
; X64-NEXT: shll $3, %eax
|
|
|
|
; X64-NEXT: subl %edi, %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X64-NEXT: retq
|
|
|
|
%mul = mul nsw i16 %x, 23
|
|
|
|
ret i16 %mul
|
|
|
|
}
|
|
|
|
|
|
|
|
define i16 @test_mul_by_24(i16 %x) {
|
|
|
|
; X86-LABEL: test_mul_by_24:
|
|
|
|
; X86: # BB#0:
|
|
|
|
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
|
|
|
|
; X86-NEXT: shll $3, %eax
|
|
|
|
; X86-NEXT: leal (%eax,%eax,2), %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X86-NEXT: retl
|
|
|
|
;
|
|
|
|
; X64-LABEL: test_mul_by_24:
|
|
|
|
; X64: # BB#0:
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X64-NEXT: shll $3, %edi
|
|
|
|
; X64-NEXT: leal (%rdi,%rdi,2), %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X64-NEXT: retq
|
|
|
|
%mul = mul nsw i16 %x, 24
|
|
|
|
ret i16 %mul
|
|
|
|
}
|
|
|
|
|
|
|
|
define i16 @test_mul_by_25(i16 %x) {
|
|
|
|
; X86-LABEL: test_mul_by_25:
|
|
|
|
; X86: # BB#0:
|
|
|
|
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
|
|
|
|
; X86-NEXT: leal (%eax,%eax,4), %eax
|
|
|
|
; X86-NEXT: leal (%eax,%eax,4), %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X86-NEXT: retl
|
|
|
|
;
|
|
|
|
; X64-LABEL: test_mul_by_25:
|
|
|
|
; X64: # BB#0:
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X64-NEXT: leal (%rdi,%rdi,4), %eax
|
|
|
|
; X64-NEXT: leal (%rax,%rax,4), %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X64-NEXT: retq
|
|
|
|
%mul = mul nsw i16 %x, 25
|
|
|
|
ret i16 %mul
|
|
|
|
}
|
|
|
|
|
|
|
|
define i16 @test_mul_by_26(i16 %x) {
|
|
|
|
; X86-LABEL: test_mul_by_26:
|
|
|
|
; X86: # BB#0:
|
2017-06-08 18:20:13 +08:00
|
|
|
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
|
|
|
|
; X86-NEXT: leal (%ecx,%ecx,8), %eax
|
|
|
|
; X86-NEXT: leal (%eax,%eax,2), %eax
|
|
|
|
; X86-NEXT: subl %ecx, %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X86-NEXT: retl
|
|
|
|
;
|
|
|
|
; X64-LABEL: test_mul_by_26:
|
|
|
|
; X64: # BB#0:
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
|
2017-06-08 18:20:13 +08:00
|
|
|
; X64-NEXT: leal (%rdi,%rdi,8), %eax
|
|
|
|
; X64-NEXT: leal (%rax,%rax,2), %eax
|
|
|
|
; X64-NEXT: subl %edi, %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X64-NEXT: retq
|
|
|
|
%mul = mul nsw i16 %x, 26
|
|
|
|
ret i16 %mul
|
|
|
|
}
|
|
|
|
|
|
|
|
define i16 @test_mul_by_27(i16 %x) {
|
|
|
|
; X86-LABEL: test_mul_by_27:
|
|
|
|
; X86: # BB#0:
|
|
|
|
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
|
|
|
|
; X86-NEXT: leal (%eax,%eax,8), %eax
|
|
|
|
; X86-NEXT: leal (%eax,%eax,2), %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X86-NEXT: retl
|
|
|
|
;
|
|
|
|
; X64-LABEL: test_mul_by_27:
|
|
|
|
; X64: # BB#0:
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X64-NEXT: leal (%rdi,%rdi,8), %eax
|
|
|
|
; X64-NEXT: leal (%rax,%rax,2), %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X64-NEXT: retq
|
|
|
|
%mul = mul nsw i16 %x, 27
|
|
|
|
ret i16 %mul
|
|
|
|
}
|
|
|
|
|
|
|
|
define i16 @test_mul_by_28(i16 %x) {
|
|
|
|
; X86-LABEL: test_mul_by_28:
|
|
|
|
; X86: # BB#0:
|
2017-06-08 18:20:13 +08:00
|
|
|
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
|
|
|
|
; X86-NEXT: leal (%ecx,%ecx,8), %eax
|
|
|
|
; X86-NEXT: leal (%eax,%eax,2), %eax
|
|
|
|
; X86-NEXT: addl %ecx, %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X86-NEXT: retl
|
|
|
|
;
|
|
|
|
; X64-LABEL: test_mul_by_28:
|
|
|
|
; X64: # BB#0:
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
|
2017-06-08 18:20:13 +08:00
|
|
|
; X64-NEXT: leal (%rdi,%rdi,8), %eax
|
|
|
|
; X64-NEXT: leal (%rax,%rax,2), %eax
|
|
|
|
; X64-NEXT: addl %edi, %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X64-NEXT: retq
|
|
|
|
%mul = mul nsw i16 %x, 28
|
|
|
|
ret i16 %mul
|
|
|
|
}
|
|
|
|
|
|
|
|
define i16 @test_mul_by_29(i16 %x) {
|
|
|
|
; X86-LABEL: test_mul_by_29:
|
|
|
|
; X86: # BB#0:
|
[X86] Improvement in CodeGen instruction selection for LEAs.
Summary:
1/ Operand folding during complex pattern matching for LEAs has been extended, such that it promotes Scale to
accommodate similar operand appearing in the DAG e.g.
T1 = A + B
T2 = T1 + 10
T3 = T2 + A
For above DAG rooted at T3, X86AddressMode will now look like
Base = B , Index = A , Scale = 2 , Disp = 10
2/ During OptimizeLEAPass down the pipeline factorization is now performed over LEAs so that if there is an opportunity
then complex LEAs (having 3 operands) could be factored out e.g.
leal 1(%rax,%rcx,1), %rdx
leal 1(%rax,%rcx,2), %rcx
will be factored as following
leal 1(%rax,%rcx,1), %rdx
leal (%rdx,%rcx) , %edx
3/ Aggressive operand folding for AM based selection for LEAs is sensitive to loops, thus avoiding creation of any complex LEAs within a loop.
4/ Simplify LEA converts (lea (BASE,1,INDEX,0) --> add (BASE, INDEX) which offers better through put.
PR32755 will be taken care of by this pathc.
Previous patch revisions : r313343 , r314886
Reviewers: lsaba, RKSimon, craig.topper, qcolombet, jmolloy, jbhateja
Reviewed By: lsaba, RKSimon, jbhateja
Subscribers: jmolloy, spatel, igorb, llvm-commits
Differential Revision: https://reviews.llvm.org/D35014
llvm-svn: 319543
2017-12-01 22:07:38 +08:00
|
|
|
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
|
|
|
|
; X86-NEXT: leal (%eax,%eax,8), %ecx
|
|
|
|
; X86-NEXT: leal (%ecx,%ecx,2), %ecx
|
|
|
|
; X86-NEXT: leal (%ecx,%eax,2), %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X86-NEXT: retl
|
|
|
|
;
|
|
|
|
; X64-LABEL: test_mul_by_29:
|
|
|
|
; X64: # BB#0:
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
|
2017-06-08 18:20:13 +08:00
|
|
|
; X64-NEXT: leal (%rdi,%rdi,8), %eax
|
|
|
|
; X64-NEXT: leal (%rax,%rax,2), %eax
|
[X86] Improvement in CodeGen instruction selection for LEAs.
Summary:
1/ Operand folding during complex pattern matching for LEAs has been extended, such that it promotes Scale to
accommodate similar operand appearing in the DAG e.g.
T1 = A + B
T2 = T1 + 10
T3 = T2 + A
For above DAG rooted at T3, X86AddressMode will now look like
Base = B , Index = A , Scale = 2 , Disp = 10
2/ During OptimizeLEAPass down the pipeline factorization is now performed over LEAs so that if there is an opportunity
then complex LEAs (having 3 operands) could be factored out e.g.
leal 1(%rax,%rcx,1), %rdx
leal 1(%rax,%rcx,2), %rcx
will be factored as following
leal 1(%rax,%rcx,1), %rdx
leal (%rdx,%rcx) , %edx
3/ Aggressive operand folding for AM based selection for LEAs is sensitive to loops, thus avoiding creation of any complex LEAs within a loop.
4/ Simplify LEA converts (lea (BASE,1,INDEX,0) --> add (BASE, INDEX) which offers better through put.
PR32755 will be taken care of by this pathc.
Previous patch revisions : r313343 , r314886
Reviewers: lsaba, RKSimon, craig.topper, qcolombet, jmolloy, jbhateja
Reviewed By: lsaba, RKSimon, jbhateja
Subscribers: jmolloy, spatel, igorb, llvm-commits
Differential Revision: https://reviews.llvm.org/D35014
llvm-svn: 319543
2017-12-01 22:07:38 +08:00
|
|
|
; X64-NEXT: leal (%rax,%rdi,2), %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X64-NEXT: retq
|
|
|
|
%mul = mul nsw i16 %x, 29
|
|
|
|
ret i16 %mul
|
|
|
|
}
|
|
|
|
|
|
|
|
define i16 @test_mul_by_30(i16 %x) {
|
|
|
|
; X86-LABEL: test_mul_by_30:
|
|
|
|
; X86: # BB#0:
|
2017-06-08 18:20:13 +08:00
|
|
|
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
|
|
|
|
; X86-NEXT: movl %ecx, %eax
|
|
|
|
; X86-NEXT: shll $5, %eax
|
|
|
|
; X86-NEXT: subl %ecx, %eax
|
|
|
|
; X86-NEXT: subl %ecx, %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X86-NEXT: retl
|
|
|
|
;
|
|
|
|
; X64-LABEL: test_mul_by_30:
|
|
|
|
; X64: # BB#0:
|
2017-06-08 18:20:13 +08:00
|
|
|
; X64-NEXT: movl %edi, %eax
|
|
|
|
; X64-NEXT: shll $5, %eax
|
|
|
|
; X64-NEXT: subl %edi, %eax
|
|
|
|
; X64-NEXT: subl %edi, %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X64-NEXT: retq
|
|
|
|
%mul = mul nsw i16 %x, 30
|
|
|
|
ret i16 %mul
|
|
|
|
}
|
|
|
|
|
|
|
|
define i16 @test_mul_by_31(i16 %x) {
|
|
|
|
; X86-LABEL: test_mul_by_31:
|
|
|
|
; X86: # BB#0:
|
|
|
|
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
|
|
|
|
; X86-NEXT: movl %ecx, %eax
|
|
|
|
; X86-NEXT: shll $5, %eax
|
|
|
|
; X86-NEXT: subl %ecx, %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X86-NEXT: retl
|
|
|
|
;
|
|
|
|
; X64-LABEL: test_mul_by_31:
|
|
|
|
; X64: # BB#0:
|
|
|
|
; X64-NEXT: movl %edi, %eax
|
|
|
|
; X64-NEXT: shll $5, %eax
|
|
|
|
; X64-NEXT: subl %edi, %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X64-NEXT: retq
|
|
|
|
%mul = mul nsw i16 %x, 31
|
|
|
|
ret i16 %mul
|
|
|
|
}
|
|
|
|
|
|
|
|
define i16 @test_mul_by_32(i16 %x) {
|
|
|
|
; X86-LABEL: test_mul_by_32:
|
|
|
|
; X86: # BB#0:
|
|
|
|
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
|
|
|
|
; X86-NEXT: shll $5, %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-03-22 20:03:56 +08:00
|
|
|
; X86-NEXT: retl
|
|
|
|
;
|
|
|
|
; X64-LABEL: test_mul_by_32:
|
|
|
|
; X64: # BB#0:
|
|
|
|
; X64-NEXT: shll $5, %edi
|
|
|
|
; X64-NEXT: movl %edi, %eax
|
|
|
|
; X64-NEXT: retq
|
|
|
|
%mul = mul nsw i16 %x, 32
|
|
|
|
ret i16 %mul
|
|
|
|
}
|
2017-06-08 18:20:13 +08:00
|
|
|
|
|
|
|
; (x*9+42)*(x*5+2)
|
|
|
|
define i16 @test_mul_spec(i16 %x) nounwind {
|
|
|
|
; X86-LABEL: test_mul_spec:
|
|
|
|
; X86: # BB#0:
|
|
|
|
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
|
|
|
|
; X86-NEXT: leal 42(%eax,%eax,8), %ecx
|
|
|
|
; X86-NEXT: leal 2(%eax,%eax,4), %eax
|
|
|
|
; X86-NEXT: imull %ecx, %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-06-08 18:20:13 +08:00
|
|
|
; X86-NEXT: retl
|
|
|
|
;
|
|
|
|
; X64-LABEL: test_mul_spec:
|
|
|
|
; X64: # BB#0:
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
|
2017-06-08 18:20:13 +08:00
|
|
|
; X64-NEXT: leal 42(%rdi,%rdi,8), %ecx
|
|
|
|
; X64-NEXT: leal 2(%rdi,%rdi,4), %eax
|
|
|
|
; X64-NEXT: imull %ecx, %eax
|
2017-11-29 01:15:09 +08:00
|
|
|
; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
|
2017-06-08 18:20:13 +08:00
|
|
|
; X64-NEXT: retq
|
|
|
|
%mul = mul nsw i16 %x, 9
|
|
|
|
%add = add nsw i16 %mul, 42
|
|
|
|
%mul2 = mul nsw i16 %x, 5
|
|
|
|
%add2 = add nsw i16 %mul2, 2
|
|
|
|
%mul3 = mul nsw i16 %add, %add2
|
|
|
|
ret i16 %mul3
|
|
|
|
}
|