2017-08-29 18:49:33 +08:00
|
|
|
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
[X86] Improvement in CodeGen instruction selection for LEAs.
Summary:
1/ Operand folding during complex pattern matching for LEAs has been extended, such that it promotes Scale to
accommodate similar operand appearing in the DAG e.g.
T1 = A + B
T2 = T1 + 10
T3 = T2 + A
For above DAG rooted at T3, X86AddressMode will now look like
Base = B , Index = A , Scale = 2 , Disp = 10
2/ During OptimizeLEAPass down the pipeline factorization is now performed over LEAs so that if there is an opportunity
then complex LEAs (having 3 operands) could be factored out e.g.
leal 1(%rax,%rcx,1), %rdx
leal 1(%rax,%rcx,2), %rcx
will be factored as following
leal 1(%rax,%rcx,1), %rdx
leal (%rdx,%rcx) , %edx
3/ Aggressive operand folding for AM based selection for LEAs is sensitive to loops, thus avoiding creation of any complex LEAs within a loop.
4/ Simplify LEA converts (lea (BASE,1,INDEX,0) --> add (BASE, INDEX) which offers better through put.
PR32755 will be taken care of by this pathc.
Previous patch revisions : r313343 , r314886
Reviewers: lsaba, RKSimon, craig.topper, qcolombet, jmolloy, jbhateja
Reviewed By: lsaba, RKSimon, jbhateja
Subscribers: jmolloy, spatel, igorb, llvm-commits
Differential Revision: https://reviews.llvm.org/D35014
llvm-svn: 319543
2017-12-01 22:07:38 +08:00
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|
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+slow-3ops-lea | FileCheck %s -check-prefix=X64
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; RUN: llc < %s -mtriple=i686-unknown -mattr=+slow-3ops-lea | FileCheck %s -check-prefix=X86
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2017-08-29 18:49:33 +08:00
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%struct.SA = type { i32 , i32 , i32 , i32 , i32};
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define void @foo(%struct.SA* nocapture %ctx, i32 %n) local_unnamed_addr #0 {
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|
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; X64-LABEL: foo:
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|
|
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; X64: # BB#0: # %entry
|
[X86] Improvement in CodeGen instruction selection for LEAs.
Summary:
1/ Operand folding during complex pattern matching for LEAs has been extended, such that it promotes Scale to
accommodate similar operand appearing in the DAG e.g.
T1 = A + B
T2 = T1 + 10
T3 = T2 + A
For above DAG rooted at T3, X86AddressMode will now look like
Base = B , Index = A , Scale = 2 , Disp = 10
2/ During OptimizeLEAPass down the pipeline factorization is now performed over LEAs so that if there is an opportunity
then complex LEAs (having 3 operands) could be factored out e.g.
leal 1(%rax,%rcx,1), %rdx
leal 1(%rax,%rcx,2), %rcx
will be factored as following
leal 1(%rax,%rcx,1), %rdx
leal (%rdx,%rcx) , %edx
3/ Aggressive operand folding for AM based selection for LEAs is sensitive to loops, thus avoiding creation of any complex LEAs within a loop.
4/ Simplify LEA converts (lea (BASE,1,INDEX,0) --> add (BASE, INDEX) which offers better through put.
PR32755 will be taken care of by this pathc.
Previous patch revisions : r313343 , r314886
Reviewers: lsaba, RKSimon, craig.topper, qcolombet, jmolloy, jbhateja
Reviewed By: lsaba, RKSimon, jbhateja
Subscribers: jmolloy, spatel, igorb, llvm-commits
Differential Revision: https://reviews.llvm.org/D35014
llvm-svn: 319543
2017-12-01 22:07:38 +08:00
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; X64-NEXT: movl (%rdi), %eax
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; X64-NEXT: movl 16(%rdi), %ecx
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; X64-NEXT: leal (%rax,%rcx,4), %eax
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; X64-NEXT: addl $1, %eax
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; X64-NEXT: movl %eax, 12(%rdi)
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; X64-NEXT: addl %ecx, %eax
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2017-08-29 18:49:33 +08:00
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; X64-NEXT: movl %eax, 16(%rdi)
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; X64-NEXT: retq
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;
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; X86-LABEL: foo:
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; X86: # BB#0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
[X86] Improvement in CodeGen instruction selection for LEAs.
Summary:
1/ Operand folding during complex pattern matching for LEAs has been extended, such that it promotes Scale to
accommodate similar operand appearing in the DAG e.g.
T1 = A + B
T2 = T1 + 10
T3 = T2 + A
For above DAG rooted at T3, X86AddressMode will now look like
Base = B , Index = A , Scale = 2 , Disp = 10
2/ During OptimizeLEAPass down the pipeline factorization is now performed over LEAs so that if there is an opportunity
then complex LEAs (having 3 operands) could be factored out e.g.
leal 1(%rax,%rcx,1), %rdx
leal 1(%rax,%rcx,2), %rcx
will be factored as following
leal 1(%rax,%rcx,1), %rdx
leal (%rdx,%rcx) , %edx
3/ Aggressive operand folding for AM based selection for LEAs is sensitive to loops, thus avoiding creation of any complex LEAs within a loop.
4/ Simplify LEA converts (lea (BASE,1,INDEX,0) --> add (BASE, INDEX) which offers better through put.
PR32755 will be taken care of by this pathc.
Previous patch revisions : r313343 , r314886
Reviewers: lsaba, RKSimon, craig.topper, qcolombet, jmolloy, jbhateja
Reviewed By: lsaba, RKSimon, jbhateja
Subscribers: jmolloy, spatel, igorb, llvm-commits
Differential Revision: https://reviews.llvm.org/D35014
llvm-svn: 319543
2017-12-01 22:07:38 +08:00
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; X86-NEXT: movl (%eax), %ecx
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; X86-NEXT: movl 16(%eax), %edx
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; X86-NEXT: leal (%ecx,%edx,4), %ecx
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; X86-NEXT: addl $1, %ecx
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; X86-NEXT: movl %ecx, 12(%eax)
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; X86-NEXT: addl %edx, %ecx
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2017-08-29 18:49:33 +08:00
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; X86-NEXT: movl %ecx, 16(%eax)
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; X86-NEXT: retl
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entry:
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%h0 = getelementptr inbounds %struct.SA, %struct.SA* %ctx, i64 0, i32 0
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%0 = load i32, i32* %h0, align 8
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%h3 = getelementptr inbounds %struct.SA, %struct.SA* %ctx, i64 0, i32 3
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%h4 = getelementptr inbounds %struct.SA, %struct.SA* %ctx, i64 0, i32 4
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%1 = load i32, i32* %h4, align 8
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%add = add i32 %0 , 1
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%add1 = add i32 %add, %1
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%add2 = add i32 %add1, %1
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%add3 = add i32 %add2, %1
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%add4 = add i32 %add3, %1
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store i32 %add4, i32* %h3, align 4
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%add29 = add i32 %add4, %1
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store i32 %add29, i32* %h4, align 8
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ret void
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}
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define void @foo_loop(%struct.SA* nocapture %ctx, i32 %n) local_unnamed_addr #0 {
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; X64-LABEL: foo_loop:
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; X64: # BB#0: # %entry
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; X64-NEXT: .p2align 4, 0x90
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; X64-NEXT: .LBB1_1: # %loop
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; X64-NEXT: # =>This Inner Loop Header: Depth=1
|
Revert r314886 "[X86] Improvement in CodeGen instruction selection for LEAs (re-applying post required revision changes.)"
It broke the Chromium / SQLite build; see PR34830.
> Summary:
> 1/ Operand folding during complex pattern matching for LEAs has been
> extended, such that it promotes Scale to accommodate similar operand
> appearing in the DAG.
> e.g.
> T1 = A + B
> T2 = T1 + 10
> T3 = T2 + A
> For above DAG rooted at T3, X86AddressMode will no look like
> Base = B , Index = A , Scale = 2 , Disp = 10
>
> 2/ During OptimizeLEAPass down the pipeline factorization is now performed over LEAs
> so that if there is an opportunity then complex LEAs (having 3 operands)
> could be factored out.
> e.g.
> leal 1(%rax,%rcx,1), %rdx
> leal 1(%rax,%rcx,2), %rcx
> will be factored as following
> leal 1(%rax,%rcx,1), %rdx
> leal (%rdx,%rcx) , %edx
>
> 3/ Aggressive operand folding for AM based selection for LEAs is sensitive to loops,
> thus avoiding creation of any complex LEAs within a loop.
>
> Reviewers: lsaba, RKSimon, craig.topper, qcolombet, jmolloy
>
> Reviewed By: lsaba
>
> Subscribers: jmolloy, spatel, igorb, llvm-commits
>
> Differential Revision: https://reviews.llvm.org/D35014
llvm-svn: 314919
2017-10-05 01:54:06 +08:00
|
|
|
; X64-NEXT: movl 16(%rdi), %eax
|
[X86] Improvement in CodeGen instruction selection for LEAs.
Summary:
1/ Operand folding during complex pattern matching for LEAs has been extended, such that it promotes Scale to
accommodate similar operand appearing in the DAG e.g.
T1 = A + B
T2 = T1 + 10
T3 = T2 + A
For above DAG rooted at T3, X86AddressMode will now look like
Base = B , Index = A , Scale = 2 , Disp = 10
2/ During OptimizeLEAPass down the pipeline factorization is now performed over LEAs so that if there is an opportunity
then complex LEAs (having 3 operands) could be factored out e.g.
leal 1(%rax,%rcx,1), %rdx
leal 1(%rax,%rcx,2), %rcx
will be factored as following
leal 1(%rax,%rcx,1), %rdx
leal (%rdx,%rcx) , %edx
3/ Aggressive operand folding for AM based selection for LEAs is sensitive to loops, thus avoiding creation of any complex LEAs within a loop.
4/ Simplify LEA converts (lea (BASE,1,INDEX,0) --> add (BASE, INDEX) which offers better through put.
PR32755 will be taken care of by this pathc.
Previous patch revisions : r313343 , r314886
Reviewers: lsaba, RKSimon, craig.topper, qcolombet, jmolloy, jbhateja
Reviewed By: lsaba, RKSimon, jbhateja
Subscribers: jmolloy, spatel, igorb, llvm-commits
Differential Revision: https://reviews.llvm.org/D35014
llvm-svn: 319543
2017-12-01 22:07:38 +08:00
|
|
|
; X64-NEXT: movl (%rdi), %ecx
|
|
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; X64-NEXT: addl %eax, %ecx
|
|
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; X64-NEXT: incl %ecx
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; X64-NEXT: movl %ecx, 12(%rdi)
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2017-08-29 18:49:33 +08:00
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; X64-NEXT: decl %esi
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; X64-NEXT: jne .LBB1_1
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; X64-NEXT: # BB#2: # %exit
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; X64-NEXT: addl %eax, %ecx
|
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|
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; X64-NEXT: addl %eax, %ecx
|
|
|
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; X64-NEXT: addl %eax, %ecx
|
|
|
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; X64-NEXT: addl %eax, %ecx
|
|
|
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; X64-NEXT: addl %eax, %ecx
|
|
|
|
; X64-NEXT: addl %eax, %ecx
|
|
|
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; X64-NEXT: addl %eax, %ecx
|
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; X64-NEXT: movl %ecx, 16(%rdi)
|
|
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; X64-NEXT: retq
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|
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;
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|
|
|
; X86-LABEL: foo_loop:
|
|
|
|
; X86: # BB#0: # %entry
|
Revert r314886 "[X86] Improvement in CodeGen instruction selection for LEAs (re-applying post required revision changes.)"
It broke the Chromium / SQLite build; see PR34830.
> Summary:
> 1/ Operand folding during complex pattern matching for LEAs has been
> extended, such that it promotes Scale to accommodate similar operand
> appearing in the DAG.
> e.g.
> T1 = A + B
> T2 = T1 + 10
> T3 = T2 + A
> For above DAG rooted at T3, X86AddressMode will no look like
> Base = B , Index = A , Scale = 2 , Disp = 10
>
> 2/ During OptimizeLEAPass down the pipeline factorization is now performed over LEAs
> so that if there is an opportunity then complex LEAs (having 3 operands)
> could be factored out.
> e.g.
> leal 1(%rax,%rcx,1), %rdx
> leal 1(%rax,%rcx,2), %rcx
> will be factored as following
> leal 1(%rax,%rcx,1), %rdx
> leal (%rdx,%rcx) , %edx
>
> 3/ Aggressive operand folding for AM based selection for LEAs is sensitive to loops,
> thus avoiding creation of any complex LEAs within a loop.
>
> Reviewers: lsaba, RKSimon, craig.topper, qcolombet, jmolloy
>
> Reviewed By: lsaba
>
> Subscribers: jmolloy, spatel, igorb, llvm-commits
>
> Differential Revision: https://reviews.llvm.org/D35014
llvm-svn: 314919
2017-10-05 01:54:06 +08:00
|
|
|
; X86-NEXT: pushl %esi
|
[X86] Improvement in CodeGen instruction selection for LEAs.
Summary:
1/ Operand folding during complex pattern matching for LEAs has been extended, such that it promotes Scale to
accommodate similar operand appearing in the DAG e.g.
T1 = A + B
T2 = T1 + 10
T3 = T2 + A
For above DAG rooted at T3, X86AddressMode will now look like
Base = B , Index = A , Scale = 2 , Disp = 10
2/ During OptimizeLEAPass down the pipeline factorization is now performed over LEAs so that if there is an opportunity
then complex LEAs (having 3 operands) could be factored out e.g.
leal 1(%rax,%rcx,1), %rdx
leal 1(%rax,%rcx,2), %rcx
will be factored as following
leal 1(%rax,%rcx,1), %rdx
leal (%rdx,%rcx) , %edx
3/ Aggressive operand folding for AM based selection for LEAs is sensitive to loops, thus avoiding creation of any complex LEAs within a loop.
4/ Simplify LEA converts (lea (BASE,1,INDEX,0) --> add (BASE, INDEX) which offers better through put.
PR32755 will be taken care of by this pathc.
Previous patch revisions : r313343 , r314886
Reviewers: lsaba, RKSimon, craig.topper, qcolombet, jmolloy, jbhateja
Reviewed By: lsaba, RKSimon, jbhateja
Subscribers: jmolloy, spatel, igorb, llvm-commits
Differential Revision: https://reviews.llvm.org/D35014
llvm-svn: 319543
2017-12-01 22:07:38 +08:00
|
|
|
; X86-NEXT: .cfi_def_cfa_offset 8
|
|
|
|
; X86-NEXT: .cfi_offset %esi, -8
|
|
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
|
2017-08-29 18:49:33 +08:00
|
|
|
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
|
|
; X86-NEXT: .p2align 4, 0x90
|
|
|
|
; X86-NEXT: .LBB1_1: # %loop
|
|
|
|
; X86-NEXT: # =>This Inner Loop Header: Depth=1
|
|
|
|
; X86-NEXT: movl 16(%eax), %ecx
|
[X86] Improvement in CodeGen instruction selection for LEAs.
Summary:
1/ Operand folding during complex pattern matching for LEAs has been extended, such that it promotes Scale to
accommodate similar operand appearing in the DAG e.g.
T1 = A + B
T2 = T1 + 10
T3 = T2 + A
For above DAG rooted at T3, X86AddressMode will now look like
Base = B , Index = A , Scale = 2 , Disp = 10
2/ During OptimizeLEAPass down the pipeline factorization is now performed over LEAs so that if there is an opportunity
then complex LEAs (having 3 operands) could be factored out e.g.
leal 1(%rax,%rcx,1), %rdx
leal 1(%rax,%rcx,2), %rcx
will be factored as following
leal 1(%rax,%rcx,1), %rdx
leal (%rdx,%rcx) , %edx
3/ Aggressive operand folding for AM based selection for LEAs is sensitive to loops, thus avoiding creation of any complex LEAs within a loop.
4/ Simplify LEA converts (lea (BASE,1,INDEX,0) --> add (BASE, INDEX) which offers better through put.
PR32755 will be taken care of by this pathc.
Previous patch revisions : r313343 , r314886
Reviewers: lsaba, RKSimon, craig.topper, qcolombet, jmolloy, jbhateja
Reviewed By: lsaba, RKSimon, jbhateja
Subscribers: jmolloy, spatel, igorb, llvm-commits
Differential Revision: https://reviews.llvm.org/D35014
llvm-svn: 319543
2017-12-01 22:07:38 +08:00
|
|
|
; X86-NEXT: movl (%eax), %edx
|
|
|
|
; X86-NEXT: addl %ecx, %edx
|
|
|
|
; X86-NEXT: incl %edx
|
|
|
|
; X86-NEXT: movl %edx, 12(%eax)
|
|
|
|
; X86-NEXT: decl %esi
|
2017-08-29 18:49:33 +08:00
|
|
|
; X86-NEXT: jne .LBB1_1
|
|
|
|
; X86-NEXT: # BB#2: # %exit
|
[X86] Improvement in CodeGen instruction selection for LEAs.
Summary:
1/ Operand folding during complex pattern matching for LEAs has been extended, such that it promotes Scale to
accommodate similar operand appearing in the DAG e.g.
T1 = A + B
T2 = T1 + 10
T3 = T2 + A
For above DAG rooted at T3, X86AddressMode will now look like
Base = B , Index = A , Scale = 2 , Disp = 10
2/ During OptimizeLEAPass down the pipeline factorization is now performed over LEAs so that if there is an opportunity
then complex LEAs (having 3 operands) could be factored out e.g.
leal 1(%rax,%rcx,1), %rdx
leal 1(%rax,%rcx,2), %rcx
will be factored as following
leal 1(%rax,%rcx,1), %rdx
leal (%rdx,%rcx) , %edx
3/ Aggressive operand folding for AM based selection for LEAs is sensitive to loops, thus avoiding creation of any complex LEAs within a loop.
4/ Simplify LEA converts (lea (BASE,1,INDEX,0) --> add (BASE, INDEX) which offers better through put.
PR32755 will be taken care of by this pathc.
Previous patch revisions : r313343 , r314886
Reviewers: lsaba, RKSimon, craig.topper, qcolombet, jmolloy, jbhateja
Reviewed By: lsaba, RKSimon, jbhateja
Subscribers: jmolloy, spatel, igorb, llvm-commits
Differential Revision: https://reviews.llvm.org/D35014
llvm-svn: 319543
2017-12-01 22:07:38 +08:00
|
|
|
; X86-NEXT: addl %ecx, %edx
|
2017-08-29 18:49:33 +08:00
|
|
|
; X86-NEXT: addl %ecx, %edx
|
|
|
|
; X86-NEXT: addl %ecx, %edx
|
|
|
|
; X86-NEXT: addl %ecx, %edx
|
|
|
|
; X86-NEXT: addl %ecx, %edx
|
|
|
|
; X86-NEXT: addl %ecx, %edx
|
|
|
|
; X86-NEXT: addl %ecx, %edx
|
|
|
|
; X86-NEXT: movl %edx, 16(%eax)
|
|
|
|
; X86-NEXT: popl %esi
|
|
|
|
; X86-NEXT: retl
|
|
|
|
entry:
|
|
|
|
br label %loop
|
|
|
|
|
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|
|
loop:
|
|
|
|
%iter = phi i32 [%n ,%entry ] ,[ %iter.ctr ,%loop]
|
|
|
|
%h0 = getelementptr inbounds %struct.SA, %struct.SA* %ctx, i64 0, i32 0
|
|
|
|
%0 = load i32, i32* %h0, align 8
|
|
|
|
%h3 = getelementptr inbounds %struct.SA, %struct.SA* %ctx, i64 0, i32 3
|
|
|
|
%h4 = getelementptr inbounds %struct.SA, %struct.SA* %ctx, i64 0, i32 4
|
|
|
|
%1 = load i32, i32* %h4, align 8
|
|
|
|
%add = add i32 %0, 1
|
|
|
|
%add4 = add i32 %add, %1
|
|
|
|
store i32 %add4, i32* %h3, align 4
|
|
|
|
%add291 = add i32 %add4, %1
|
|
|
|
%add292 = add i32 %add291, %1
|
|
|
|
%add293 = add i32 %add292, %1
|
|
|
|
%add294 = add i32 %add293, %1
|
|
|
|
%add295 = add i32 %add294, %1
|
|
|
|
%add296 = add i32 %add295, %1
|
|
|
|
%add29 = add i32 %add296, %1
|
|
|
|
%iter.ctr = sub i32 %iter , 1
|
|
|
|
%res = icmp ne i32 %iter.ctr , 0
|
|
|
|
br i1 %res , label %loop , label %exit
|
|
|
|
|
|
|
|
exit:
|
|
|
|
store i32 %add29, i32* %h4, align 8
|
|
|
|
ret void
|
|
|
|
}
|