llvm-project/llvm/test/CodeGen/Mips/mips64lea.ll

; RUN: llc -march=mips64el -mcpu=mips4 < %s | FileCheck %s
; RUN: llc -march=mips64el -mcpu=mips64 < %s | FileCheck %s

define void @foo3() nounwind {
entry:
; CHECK: daddiu ${{[0-9]+}}, $sp
  %a = alloca i32, align 4
  call void @foo1(i32* %a) nounwind
  ret void
}

declare void @foo1(i32*)
[mips] MIPS-IV is broadly the same as MIPS64 so duplicate all -mcpu=mips64 tests with -mcpu=mips4 as a starting point Summary: Two exceptions to this: test/CodeGen/Mips/octeon.ll test/CodeGen/Mips/octeon_popcnt.ll these test extensions to MIPS64 One test is altered for MIPS-IV: test/CodeGen/Mips/mips64countleading.ll Tests dclo/dclz which were added in MIPS64. The MIPS-IV version tests that dclo/dclz are not emitted. Four tests fail and are not in this patch: test/CodeGen/Mips/abicalls.ll test/CodeGen/Mips/fcopysign-f32-f64.ll test/CodeGen/Mips/fcopysign.ll test/CodeGen/Mips/stack-alignment.ll Depends on D3343 Reviewers: matheusalmeida, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3344 llvm-svn: 206185 2014-04-15 00:00:28 +08:00			`; RUN: llc -march=mips64el -mcpu=mips4 < %s \| FileCheck %s`
Test case for r147232. llvm-svn: 147233 2011-12-24 11:05:43 +08:00			`; RUN: llc -march=mips64el -mcpu=mips64 < %s \| FileCheck %s`

			`define void @foo3() nounwind {`
			`entry:`
			`; CHECK: daddiu ${{[0-9]+}}, $sp`
			`%a = alloca i32, align 4`
			`call void @foo1(i32* %a) nounwind`
			`ret void`
			`}`

			`declare void @foo1(i32*)`