2017-06-27 07:05:51 +08:00
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; RUN: llc -mtriple=x86_64-- -O2 -start-after=stack-protector -stop-before=loops %s -o - | FileCheck %s
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; This test verifies the fix for PR33368.
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;
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; The expected outcome of the operation is to store bytes 0 and 2 of the incoming
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; parameter into c2 (a 2 x i8 vector). DAGCombine converts shuffles into a
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; sequence of extend and subsequent truncate operations. The bug was that an extension
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; by 4 followed by a truncation by 8 was completely eliminated.
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; The test checks for the correct sequence of operations that results from the
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; preservation of the extend/truncate operations mentioned above (2 extend and
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; 3 truncate instructions).
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;
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2017-10-12 08:24:52 +08:00
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; NOTE: This operation could be collapsed in to a single truncate. Once that is done
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; this test will have to be adjusted.
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2017-06-27 07:05:51 +08:00
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2017-10-12 08:24:52 +08:00
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; CHECK: PUNPCKLBWrr
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; CHECK: PUNPCKLWDrr
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; CHECK: PANDrm
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; CHECK: PACKUSWBrr
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2017-06-27 07:05:51 +08:00
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; CHECK: PACKUSWBrr
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; CHECK: PACKUSWBrr
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DAGCombine: Combine BUILD_VECTOR to TRUNCATE
Summary:
Add a combine for creating a truncate to replace a build_vector composed of extracts with
indices that form a stride-2^N series.
Example:
v8i32 V = ...
v4i32 build_vector((extract_elt V, 0), (extract_elt V, 2), (extract_elt V, 4), (extract_elt V, 6))
-->
v4i32 truncate (bitcast V to v4i64)
Related discussion in llvm-dev about canonicalizing shuffles to
truncates in LLVM IR:
http://lists.llvm.org/pipermail/llvm-dev/2017-January/108936.html.
Reviewers: spatel, RKSimon, efriedma, igorb, craig.topper, wolfgangp, delena
Reviewed By: delena
Subscribers: guyblank, delena, javed.absar, llvm-commits
Differential Revision: https://reviews.llvm.org/D34077
llvm-svn: 307036
2017-07-03 23:47:40 +08:00
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; CHECK: MOVPDI2DIrr
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2017-06-27 07:05:51 +08:00
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define void @test(double %vec.coerce) local_unnamed_addr {
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entry:
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%c2 = alloca <2 x i8>, align 2
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%0 = bitcast double %vec.coerce to <8 x i8>
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%1 = shufflevector <8 x i8> %0, <8 x i8> undef, <4 x i32> <i32 2, i32 undef, i32 undef, i32 0>
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%2 = shufflevector <4 x i8> %1, <4 x i8> undef, <2 x i32> <i32 3, i32 0>
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store volatile <2 x i8> %2, <2 x i8>* %c2, align 2
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br label %if.end
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if.end:
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%3 = bitcast <2 x i8> %2 to i16
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ret void
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}
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