2015-07-30 20:39:33 +08:00
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; RUN: llc < %s -march=mipsel -mcpu=mips32 -O0 -relocation-model=pic
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; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -O0 -relocation-model=pic
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2015-06-01 23:48:09 +08:00
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; The test is just to make sure it is able to allocate
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; registers for this example. There was an issue with allocating AC0
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; after a mul instruction.
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declare { i32, i1 } @llvm.smul.with.overflow.i32(i32, i32)
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define i32 @foo(i32 %a, i32 %b) {
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entry:
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%0 = mul i32 %a, %b
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%1 = call { i32, i1 } @llvm.smul.with.overflow.i32(i32 %0, i32 %b)
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%2 = extractvalue { i32, i1 } %1, 0
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ret i32 %2
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}
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