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llvm-project/llvm/test/CodeGen/Thumb2/ldr-str-imm12.ll

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Replace "no-frame-pointer-*" function attributes with "frame-pointer" Part of the effort to refactoring frame pointer code generation. We used to use two function attributes "no-frame-pointer-elim" and "no-frame-pointer-elim-non-leaf" to represent three kinds of frame pointer usage: (all) frames use frame pointer, (non-leaf) frames use frame pointer, (none) frame use frame pointer. This CL makes the idea explicit by using only one enum function attribute "frame-pointer" Option "-frame-pointer=" replaces "-disable-fp-elim" for tools such as llc. "no-frame-pointer-elim" and "no-frame-pointer-elim-non-leaf" are still supported for easy migration to "frame-pointer". tests are mostly updated with // replace command line args ‘-disable-fp-elim=false’ with ‘-frame-pointer=none’ grep -iIrnl '\-disable-fp-elim=false' * | xargs sed -i '' -e "s/-disable-fp-elim=false/-frame-pointer=none/g" // replace command line args ‘-disable-fp-elim’ with ‘-frame-pointer=all’ grep -iIrnl '\-disable-fp-elim' * | xargs sed -i '' -e "s/-disable-fp-elim/-frame-pointer=all/g" Patch by Yuanfang Chen (tabloid.adroit)! Differential Revision: https://reviews.llvm.org/D56351 llvm-svn: 351049
2019-01-14 18:55:55 +08:00
; RUN: llc < %s -mtriple=thumbv7-apple-darwin -arm-atomic-cfg-tidy=0 -mcpu=cortex-a8 -relocation-model=pic -frame-pointer=all | FileCheck %s
Make use of imm12 version of Thumb2 ldr / str instructions more aggressively. llvm-svn: 85743
2009-11-02 05:12:51 +08:00
; rdar://7352504
; Make sure we use "str r9, [sp, #+28]" instead of "sub.w r4, r7, #256" followed by "str r9, [r4, #-32]".
%0 = type { i16, i8, i8 }
%1 = type { [2 x i32], [2 x i32] }
%2 = type { %union.rec* }
%struct.FILE_POS = type { i8, i8, i16, i32 }
%struct.GAP = type { i8, i8, i16 }
%struct.LIST = type { %union.rec*, %union.rec* }
%struct.STYLE = type { %union.anon, %union.anon, i16, i16, i32 }
%struct.head_type = type { [2 x %struct.LIST], %union.FIRST_UNION, %union.SECOND_UNION, %union.THIRD_UNION, %union.FOURTH_UNION, %union.rec*, %2, %union.rec*, %union.rec*, %union.rec*, %union.rec*, %union.rec*, %union.rec*, %union.rec*, %union.rec*, i32 }
%union.FIRST_UNION = type { %struct.FILE_POS }
%union.FOURTH_UNION = type { %struct.STYLE }
%union.SECOND_UNION = type { %0 }
%union.THIRD_UNION = type { %1 }
%union.anon = type { %struct.GAP }
%union.rec = type { %struct.head_type }
@zz_hold = external global %union.rec* ; <%union.rec**> [#uses=2]
@zz_res = external global %union.rec* ; <%union.rec**> [#uses=1]
Remove arm_apcscc from the test files. It is the default and doing this matches what llvm-gcc and clang now produce. llvm-svn: 106221
2010-06-17 23:18:27 +08:00
define %union.rec* @Manifest(%union.rec* %x, %union.rec* %env, %struct.STYLE* %style, %union.rec** %bthr, %union.rec** %fthr, %union.rec** %target, %union.rec** %crs, i32 %ok, i32 %need_expand, %union.rec** %enclose, i32 %fcr) nounwind {
Make use of imm12 version of Thumb2 ldr / str instructions more aggressively. llvm-svn: 85743
2009-11-02 05:12:51 +08:00
entry:
Switch ARM to using AltOrders instead of MethodBodies. This slightly changes the GPR allocation order on Darwin where R9 is not a callee-saved register: Before: %R0 %R1 %R2 %R3 %R12 %R9 %LR %R4 %R5 %R6 %R8 %R10 %R11 After: %R0 %R1 %R2 %R3 %R9 %R12 %LR %R4 %R5 %R6 %R8 %R10 %R11 llvm-svn: 133326
2011-06-18 09:14:46 +08:00
; CHECK: ldr{{(.w)?}} {{(r[0-9]+)|(lr)}}, [r7, #28]
Make use of imm12 version of Thumb2 ldr / str instructions more aggressively. llvm-svn: 85743
2009-11-02 05:12:51 +08:00
%xgaps.i = alloca [32 x %union.rec*], align 4 ; <[32 x %union.rec*]*> [#uses=0]
%ycomp.i = alloca [32 x %union.rec*], align 4 ; <[32 x %union.rec*]*> [#uses=0]
Eliminate the first have of the optimization which eliminates BRCOND when the condition is constant. This optimization shouldn't be necessary, because codegen shouldn't be able to find dead control paths that the IR-level optimizer can't find. And it's undesirable, because it encourages bugpoint to leave "br i1 false" branches in its output. And it wasn't updating the CFG. I updated all the tests I could, but some tests are too reduced and I wasn't able to meaningfully preserve them. llvm-svn: 106748
2010-06-24 23:04:11 +08:00
br label %bb20
Make use of imm12 version of Thumb2 ldr / str instructions more aggressively. llvm-svn: 85743
2009-11-02 05:12:51 +08:00
bb20: ; preds = %entry
switch i32 undef, label %bb1287 [
[Codegen] Decrease minimum jump table density. Minimum density for both optsize and non optsize are now options -sparse-jump-table-density (default 10) for non optsize functions -dense-jump-table-density (default 40) for optsize functions, which matches the current default. This improves several benchmarks at google at the cost of a small codesize increase. For code compiled with -Os, the old behavior continues llvm-svn: 264689
2016-03-29 08:23:41 +08:00
i32 110, label %bb119
i32 120, label %bb119
i32 210, label %bb420
i32 230, label %bb420
i32 450, label %bb438
i32 460, label %bb438
i32 550, label %bb533
i32 560, label %bb569
i32 640, label %bb745
i32 780, label %bb1098
Make use of imm12 version of Thumb2 ldr / str instructions more aggressively. llvm-svn: 85743
2009-11-02 05:12:51 +08:00
]
bb119: ; preds = %bb20, %bb20
unreachable
bb420: ; preds = %bb20, %bb20
Shrink ldr / str [sp, imm0-1024] to 16-bit instructions. llvm-svn: 89326
2009-11-19 14:32:27 +08:00
; CHECK: bb420
Linear scan is going away. llvm-svn: 144472
2011-11-13 06:39:34 +08:00
; CHECK: str{{(.w)?}} r{{[0-9]+}}, [sp
; CHECK: str{{(.w)?}} r{{[0-9]+}}, [sp
; CHECK: str{{(.w)?}} r{{[0-9]+}}, [sp
; CHECK: str{{(.w)?}} r{{[0-9]+}}, [sp
Elide stores which are overwritten without being observed. Summary: In SelectionDAG, when a store is immediately chained to another store to the same address, elide the first store as it has no observable effects. This is causes small improvements dealing with intrinsics lowered to stores. Test notes: * Many testcases overwrite store addresses multiple times and needed minor changes, mainly making stores volatile to prevent the optimization from optimizing the test away. * Many X86 test cases optimized out instructions associated with associated with va_start. * Note that test_splat in CodeGen/AArch64/misched-stp.ll no longer has dependencies to check and can probably be removed and potentially replaced with another test. Reviewers: rnk, john.brawn Subscribers: aemerson, rengolin, qcolombet, jyknight, nemanjai, nhaehnle, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D33206 llvm-svn: 303198
2017-05-17 03:43:56 +08:00
store volatile %union.rec* null, %union.rec** @zz_hold, align 4
Make use of imm12 version of Thumb2 ldr / str instructions more aggressively. llvm-svn: 85743
2009-11-02 05:12:51 +08:00
store %union.rec* null, %union.rec** @zz_res, align 4
Elide stores which are overwritten without being observed. Summary: In SelectionDAG, when a store is immediately chained to another store to the same address, elide the first store as it has no observable effects. This is causes small improvements dealing with intrinsics lowered to stores. Test notes: * Many testcases overwrite store addresses multiple times and needed minor changes, mainly making stores volatile to prevent the optimization from optimizing the test away. * Many X86 test cases optimized out instructions associated with associated with va_start. * Note that test_splat in CodeGen/AArch64/misched-stp.ll no longer has dependencies to check and can probably be removed and potentially replaced with another test. Reviewers: rnk, john.brawn Subscribers: aemerson, rengolin, qcolombet, jyknight, nemanjai, nhaehnle, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D33206 llvm-svn: 303198
2017-05-17 03:43:56 +08:00
store volatile %union.rec* %x, %union.rec** @zz_hold, align 4
Remove arm_apcscc from the test files. It is the default and doing this matches what llvm-gcc and clang now produce. llvm-svn: 106221
2010-06-17 23:18:27 +08:00
%0 = call %union.rec* @Manifest(%union.rec* undef, %union.rec* %env, %struct.STYLE* %style, %union.rec** %bthr, %union.rec** %fthr, %union.rec** %target, %union.rec** %crs, i32 %ok, i32 %need_expand, %union.rec** %enclose, i32 %fcr) nounwind ; <%union.rec*> [#uses=0]
Make use of imm12 version of Thumb2 ldr / str instructions more aggressively. llvm-svn: 85743
2009-11-02 05:12:51 +08:00
unreachable
bb438: ; preds = %bb20, %bb20
unreachable
bb533: ; preds = %bb20
ret %union.rec* %x
bb569: ; preds = %bb20
unreachable
bb745: ; preds = %bb20
unreachable
bb1098: ; preds = %bb20
unreachable
bb1287: ; preds = %bb20
unreachable
}