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llvm-project/llvm/test/CodeGen/ARM/fast-isel-deadcode.ll

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Change the fast-isel-abort option from bool to int to enable "levels" Summary: Currently fast-isel-abort will only abort for regular instructions, and just warn for function calls, terminators, function arguments. There is already fast-isel-abort-args but nothing for calls and terminators. This change turns the fast-isel-abort options into an integer option, so that multiple levels of strictness can be defined. This will help no being surprised when the "abort" option indeed does not abort, and enables the possibility to write test that verifies that no intrinsics are forgotten by fast-isel. Reviewers: resistor, echristo Subscribers: jfb, llvm-commits Differential Revision: http://reviews.llvm.org/D7941 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 230775
2015-02-28 02:32:11 +08:00
; RUN: llc < %s -O0 -fast-isel-abort=1 -verify-machineinstrs -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB
If fast-isel fails, remove dead instructions generated during the failed attempt. llvm-svn: 145425
2011-11-30 03:40:47 +08:00
; Target-specific selector can't properly handle the double because it isn't
; being passed via a register, so the materialized arguments become dead code.
define i32 @main(i32 %argc, i8** %argv) nounwind {
entry:
; THUMB: main
call void @printArgsNoRet(i32 1, float 0x4000CCCCC0000000, i8 signext 99, double 4.100000e+00)
ARM: stop emitting blx instructions for most calls on MachO. I'm really not sure why we were in the first place, it's the linker's job to convert between BL/BLX as necessary. Even worse, using BLX left Thumb calls that could be locally resolved completely unencodable since all offsets to BLX are multiples of 4. rdar://26182344 llvm-svn: 269101
2016-05-11 03:17:47 +08:00
; THUMB: bl _printArgsNoRet
If fast-isel fails, remove dead instructions generated during the failed attempt. llvm-svn: 145425
2011-11-30 03:40:47 +08:00
; THUMB-NOT: ldr
; THUMB-NOT: vldr
; THUMB-NOT: vmov
; THUMB-NOT: ldr
; THUMB-NOT: sxtb
; THUMB: movs r0, #0
Reapply r146997, "Heed spill slot alignment on ARM." Now that canRealignStack() understands frozen reserved registers, it is safe to use it for aligned spill instructions. It will only return true if the registers reserved at the beginning of register allocation allow for dynamic stack realignment. <rdar://problem/10625436> llvm-svn: 147579
2012-01-05 08:26:57 +08:00
; THUMB: pop
If fast-isel fails, remove dead instructions generated during the failed attempt. llvm-svn: 145425
2011-11-30 03:40:47 +08:00
ret i32 0
}
declare void @printArgsNoRet(i32 %a1, float %a2, i8 signext %a3, double %a4)