forked from OSchip/llvm-project
23 lines
1012 B
LLVM
23 lines
1012 B
LLVM
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; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers
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; Regression test for PR40267. Tests that invalid indices in
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; extract_vector_elt can be handled when vectors ops are split. Notice
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; that SIMD is not enabled for this test. Check only that llc does not
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; crash, since it would previously trigger an assertion.
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target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
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target triple = "wasm32-unknown-unknown"
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define void @foo() {
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%L6 = load i32, i32* undef
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br label %BB1
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BB1: ; preds = %BB1, %0
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%bj = select <4 x i1> <i1 true, i1 true, i1 false, i1 false>, <4 x i32> <i32 55, i32 21, i32 92, i32 68>, <4 x i32> <i32 51, i32 61, i32 62, i32 39>
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%E1 = extractelement <4 x i32> %bj, i32 0
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%E23 = extractelement <4 x i32> zeroinitializer, i32 %E1
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%I33 = insertelement <4 x i32> undef, i32 %E23, i1 undef
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store <4 x i32> %I33, <4 x i32>* undef
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br label %BB1
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}
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