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llvm-project/llvm/test/CodeGen/Mips/tls16_2.ll

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Set some tests to an unknown vendor and OS This avoids llc using the hosts OS/vendor as defaults and triggering unwanted behaviour in the tests. This should deal with the buildbot breakages on windows after r283140. llvm-svn: 283149
2016-10-04 05:58:20 +08:00
; RUN: llc -mtriple=mipsel-- -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=PIC16
Implement MipsHi for mips16 llvm-svn: 166852
2012-10-27 08:57:14 +08:00
@f.i = internal thread_local unnamed_addr global i32 1, align 4
define i8* @f(i8* nocapture %a) nounwind {
entry:
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%0 = load i32, i32* @f.i, align 4
Implement MipsHi for mips16 llvm-svn: 166852
2012-10-27 08:57:14 +08:00
%inc = add nsw i32 %0, 1
store i32 %inc, i32* @f.i, align 4
%1 = inttoptr i32 %inc to i8*
; PIC16: addiu ${{[0-9]+}}, %tlsldm(f.i)
ret i8* %1
}