2017-03-01 07:37:04 +08:00
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; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -disable-wasm-explicit-locals | FileCheck %s
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2015-12-10 08:26:26 +08:00
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; Test various types and operators that need to be legalized.
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2016-01-07 11:19:23 +08:00
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target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
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2017-03-01 07:37:04 +08:00
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target triple = "wasm32-unknown-unknown-wasm"
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2015-12-10 08:26:26 +08:00
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; CHECK-LABEL: shl_i3:
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2015-12-10 22:52:34 +08:00
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; CHECK: i32.const $push0=, 7{{$}}
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; CHECK: i32.and $push1=, $1, $pop0{{$}}
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; CHECK: i32.shl $push2=, $0, $pop1{{$}}
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2015-12-10 08:26:26 +08:00
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define i3 @shl_i3(i3 %a, i3 %b, i3* %p) {
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%t = shl i3 %a, %b
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ret i3 %t
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}
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; CHECK-LABEL: shl_i53:
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2015-12-10 22:52:34 +08:00
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; CHECK: i64.const $push0=, 9007199254740991{{$}}
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; CHECK: i64.and $push1=, $1, $pop0{{$}}
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; CHECK: i64.shl $push2=, $0, $pop1{{$}}
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2015-12-10 08:26:26 +08:00
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define i53 @shl_i53(i53 %a, i53 %b, i53* %p) {
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%t = shl i53 %a, %b
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ret i53 %t
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}
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2015-12-10 09:00:19 +08:00
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; CHECK-LABEL: sext_in_reg_i32_i64:
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; CHECK: i64.shl
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; CHECK: i64.shr_s
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define i64 @sext_in_reg_i32_i64(i64 %a) {
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%b = shl i64 %a, 32
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%c = ashr i64 %b, 32
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ret i64 %c
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}
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2015-12-10 10:07:53 +08:00
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; CHECK-LABEL: fpext_f32_f64:
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; CHECK: f32.load $push0=, 0($0){{$}}
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2015-12-10 22:52:34 +08:00
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; CHECK: f64.promote/f32 $push1=, $pop0{{$}}
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2015-12-10 10:07:53 +08:00
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; CHECK: return $pop1{{$}}
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define double @fpext_f32_f64(float *%p) {
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%v = load float, float* %p
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%e = fpext float %v to double
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ret double %e
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}
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; CHECK-LABEL: fpconv_f64_f32:
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; CHECK: f64.load $push0=, 0($0){{$}}
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2015-12-10 22:52:34 +08:00
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; CHECK: f32.demote/f64 $push1=, $pop0{{$}}
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2015-12-10 10:07:53 +08:00
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; CHECK: return $pop1{{$}}
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define float @fpconv_f64_f32(double *%p) {
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%v = load double, double* %p
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%e = fptrunc double %v to float
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ret float %e
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}
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2015-12-17 07:25:51 +08:00
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; Check that big shifts work. This generates a big pile of code from the
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; legalizer; the main thing here is that we don't abort.
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; CHECK-LABEL: bigshift:
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define i1024 @bigshift(i1024 %a, i1024 %b) {
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%c = shl i1024 %a, %b
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ret i1024 %c
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}
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