2017-06-07 06:06:07 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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2017-06-01 01:12:38 +08:00
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; RUN: llc -verify-machineinstrs -mcpu=pwr8 < %s | FileCheck %s
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target datalayout = "e-m:e-i64:64-n32:64"
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target triple = "powerpc64le-unknown-linux-gnu"
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@zeroEqualityTest01.buffer1 = private unnamed_addr constant [3 x i32] [i32 1, i32 2, i32 4], align 4
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@zeroEqualityTest01.buffer2 = private unnamed_addr constant [3 x i32] [i32 1, i32 2, i32 3], align 4
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@zeroEqualityTest02.buffer1 = private unnamed_addr constant [4 x i32] [i32 4, i32 0, i32 0, i32 0], align 4
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@zeroEqualityTest02.buffer2 = private unnamed_addr constant [4 x i32] [i32 3, i32 0, i32 0, i32 0], align 4
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@zeroEqualityTest03.buffer1 = private unnamed_addr constant [4 x i32] [i32 0, i32 0, i32 0, i32 3], align 4
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@zeroEqualityTest03.buffer2 = private unnamed_addr constant [4 x i32] [i32 0, i32 0, i32 0, i32 4], align 4
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@zeroEqualityTest04.buffer1 = private unnamed_addr constant [15 x i32] [i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14], align 4
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@zeroEqualityTest04.buffer2 = private unnamed_addr constant [15 x i32] [i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 13], align 4
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declare signext i32 @memcmp(i8* nocapture, i8* nocapture, i64) local_unnamed_addr #1
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2017-06-07 06:06:07 +08:00
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; Check 4 bytes - requires 1 load for each param.
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define signext i32 @zeroEqualityTest02(i8* %x, i8* %y) {
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; CHECK-LABEL: zeroEqualityTest02:
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; CHECK: # BB#0: # %loadbb
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; CHECK-NEXT: lwz 3, 0(3)
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; CHECK-NEXT: lwz 4, 0(4)
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; CHECK-NEXT: li 5, 1
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; CHECK-NEXT: xor 3, 3, 4
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; CHECK-NEXT: cmplwi 3, 0
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; CHECK-NEXT: isel 3, 0, 5, 2
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; CHECK-NEXT: clrldi 3, 3, 32
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; CHECK-NEXT: blr
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%call = tail call signext i32 @memcmp(i8* %x, i8* %y, i64 4)
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%not.cmp = icmp ne i32 %call, 0
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%. = zext i1 %not.cmp to i32
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2017-06-01 01:12:38 +08:00
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ret i32 %.
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}
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2017-06-07 06:06:07 +08:00
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; Check 16 bytes - requires 2 loads for each param (or use vectors?).
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define signext i32 @zeroEqualityTest01(i8* %x, i8* %y) {
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; CHECK-LABEL: zeroEqualityTest01:
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; CHECK: # BB#0: # %loadbb
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; CHECK-NEXT: ld 5, 0(3)
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; CHECK-NEXT: ld 6, 0(4)
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; CHECK-NEXT: xor. 5, 5, 6
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; CHECK-NEXT: bne 0, .LBB1_2
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; CHECK-NEXT: # BB#1: # %loadbb1
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; CHECK-NEXT: ld 3, 8(3)
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; CHECK-NEXT: ld 4, 8(4)
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; CHECK-NEXT: xor. 3, 3, 4
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; CHECK-NEXT: beq 0, .LBB1_3
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; CHECK-NEXT: .LBB1_2: # %res_block
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; CHECK-NEXT: li 3, 1
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; CHECK-NEXT: clrldi 3, 3, 32
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; CHECK-NEXT: blr
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; CHECK-NEXT: .LBB1_3:
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; CHECK-NEXT: li 3, 0
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; CHECK-NEXT: clrldi 3, 3, 32
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; CHECK-NEXT: blr
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%call = tail call signext i32 @memcmp(i8* %x, i8* %y, i64 16)
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%not.tobool = icmp ne i32 %call, 0
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%. = zext i1 %not.tobool to i32
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2017-06-01 01:12:38 +08:00
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ret i32 %.
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2017-06-07 06:06:07 +08:00
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}
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2017-06-01 01:12:38 +08:00
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2017-06-07 06:06:07 +08:00
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; Check 7 bytes - requires 3 loads for each param.
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define signext i32 @zeroEqualityTest03(i8* %x, i8* %y) {
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; CHECK-LABEL: zeroEqualityTest03:
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; CHECK: # BB#0: # %loadbb
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; CHECK-NEXT: lwz 5, 0(3)
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; CHECK-NEXT: lwz 6, 0(4)
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; CHECK-NEXT: xor 5, 5, 6
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; CHECK-NEXT: cmplwi 5, 0
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; CHECK-NEXT: bne 0, .LBB2_3
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; CHECK-NEXT: # BB#1: # %loadbb1
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; CHECK-NEXT: lhz 5, 4(3)
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; CHECK-NEXT: lhz 6, 4(4)
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; CHECK-NEXT: xor 5, 5, 6
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; CHECK-NEXT: rlwinm. 5, 5, 0, 16, 31
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; CHECK-NEXT: bne 0, .LBB2_3
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; CHECK-NEXT: # BB#2: # %loadbb2
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; CHECK-NEXT: lbz 3, 6(3)
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; CHECK-NEXT: lbz 4, 6(4)
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; CHECK-NEXT: xor 3, 3, 4
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; CHECK-NEXT: rlwinm. 3, 3, 0, 24, 31
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; CHECK-NEXT: beq 0, .LBB2_4
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; CHECK-NEXT: .LBB2_3: # %res_block
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; CHECK-NEXT: li 3, 1
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; CHECK-NEXT: clrldi 3, 3, 32
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; CHECK-NEXT: blr
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; CHECK-NEXT: .LBB2_4:
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; CHECK-NEXT: li 3, 0
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; CHECK-NEXT: clrldi 3, 3, 32
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; CHECK-NEXT: blr
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%call = tail call signext i32 @memcmp(i8* %x, i8* %y, i64 7)
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%not.lnot = icmp ne i32 %call, 0
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%cond = zext i1 %not.lnot to i32
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ret i32 %cond
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2017-06-01 01:12:38 +08:00
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}
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; Validate with > 0
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2017-06-07 06:06:07 +08:00
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define signext i32 @zeroEqualityTest04() {
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; CHECK-LABEL: zeroEqualityTest04:
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; CHECK: # BB#0: # %loadbb
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; CHECK-NEXT: addis 3, 2, .LzeroEqualityTest02.buffer1@toc@ha
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; CHECK-NEXT: addis 4, 2, .LzeroEqualityTest02.buffer2@toc@ha
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; CHECK-NEXT: addi 6, 3, .LzeroEqualityTest02.buffer1@toc@l
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; CHECK-NEXT: addi 5, 4, .LzeroEqualityTest02.buffer2@toc@l
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; CHECK-NEXT: ldbrx 3, 0, 6
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; CHECK-NEXT: ldbrx 4, 0, 5
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; CHECK-NEXT: subf. 7, 4, 3
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; CHECK-NEXT: bne 0, .LBB3_2
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; CHECK-NEXT: # BB#1: # %loadbb1
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; CHECK-NEXT: li 4, 8
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; CHECK-NEXT: ldbrx 3, 6, 4
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; CHECK-NEXT: ldbrx 4, 5, 4
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; CHECK-NEXT: subf. 5, 4, 3
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; CHECK-NEXT: beq 0, .LBB3_4
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; CHECK-NEXT: .LBB3_2: # %res_block
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; CHECK-NEXT: cmpld 3, 4
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; CHECK-NEXT: li 3, 1
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; CHECK-NEXT: li 12, -1
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; CHECK-NEXT: isel 3, 12, 3, 0
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; CHECK-NEXT: .LBB3_3: # %endblock
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; CHECK-NEXT: cmpwi 3, 1
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; CHECK-NEXT: li 3, 0
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; CHECK-NEXT: li 4, 1
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; CHECK-NEXT: isel 3, 4, 3, 0
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; CHECK-NEXT: blr
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; CHECK-NEXT: .LBB3_4:
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; CHECK-NEXT: li 3, 0
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; CHECK-NEXT: b .LBB3_3
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2017-06-01 01:12:38 +08:00
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%call = tail call signext i32 @memcmp(i8* bitcast ([4 x i32]* @zeroEqualityTest02.buffer1 to i8*), i8* bitcast ([4 x i32]* @zeroEqualityTest02.buffer2 to i8*), i64 16)
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%not.cmp = icmp slt i32 %call, 1
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%. = zext i1 %not.cmp to i32
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ret i32 %.
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}
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; Validate with < 0
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2017-06-07 06:06:07 +08:00
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define signext i32 @zeroEqualityTest05() {
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; CHECK-LABEL: zeroEqualityTest05:
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; CHECK: # BB#0: # %loadbb
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; CHECK-NEXT: addis 3, 2, .LzeroEqualityTest03.buffer1@toc@ha
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; CHECK-NEXT: addis 4, 2, .LzeroEqualityTest03.buffer2@toc@ha
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; CHECK-NEXT: addi 6, 3, .LzeroEqualityTest03.buffer1@toc@l
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; CHECK-NEXT: addi 5, 4, .LzeroEqualityTest03.buffer2@toc@l
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; CHECK-NEXT: ldbrx 3, 0, 6
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; CHECK-NEXT: ldbrx 4, 0, 5
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; CHECK-NEXT: subf. 7, 4, 3
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; CHECK-NEXT: bne 0, .LBB4_2
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; CHECK-NEXT: # BB#1: # %loadbb1
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; CHECK-NEXT: li 4, 8
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; CHECK-NEXT: ldbrx 3, 6, 4
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; CHECK-NEXT: ldbrx 4, 5, 4
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; CHECK-NEXT: subf. 5, 4, 3
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; CHECK-NEXT: beq 0, .LBB4_4
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; CHECK-NEXT: .LBB4_2: # %res_block
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; CHECK-NEXT: cmpld 3, 4
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; CHECK-NEXT: li 3, 1
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; CHECK-NEXT: li 12, -1
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; CHECK-NEXT: isel 3, 12, 3, 0
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; CHECK-NEXT: .LBB4_3: # %endblock
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; CHECK-NEXT: srwi 3, 3, 31
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; CHECK-NEXT: xori 3, 3, 1
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; CHECK-NEXT: clrldi 3, 3, 32
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; CHECK-NEXT: blr
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; CHECK-NEXT: .LBB4_4:
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; CHECK-NEXT: li 3, 0
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; CHECK-NEXT: b .LBB4_3
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2017-06-01 01:12:38 +08:00
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%call = tail call signext i32 @memcmp(i8* bitcast ([4 x i32]* @zeroEqualityTest03.buffer1 to i8*), i8* bitcast ([4 x i32]* @zeroEqualityTest03.buffer2 to i8*), i64 16)
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%call.lobit = lshr i32 %call, 31
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%call.lobit.not = xor i32 %call.lobit, 1
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ret i32 %call.lobit.not
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}
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; Validate with memcmp()?:
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; Function Attrs: nounwind readonly
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2017-06-07 06:06:07 +08:00
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define signext i32 @zeroEqualityTest06() {
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; CHECK-LABEL: zeroEqualityTest06:
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; CHECK: # BB#0: # %loadbb
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; CHECK-NEXT: addis 3, 2, .LzeroEqualityTest04.buffer1@toc@ha
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; CHECK-NEXT: addis 4, 2, .LzeroEqualityTest04.buffer2@toc@ha
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; CHECK-NEXT: ld 3, .LzeroEqualityTest04.buffer1@toc@l(3)
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; CHECK-NEXT: ld 4, .LzeroEqualityTest04.buffer2@toc@l(4)
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; CHECK-NEXT: xor. 3, 3, 4
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; CHECK-NEXT: bne 0, .LBB5_2
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; CHECK-NEXT: # BB#1: # %loadbb1
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; CHECK-NEXT: addis 3, 2, .LzeroEqualityTest04.buffer1@toc@ha+8
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; CHECK-NEXT: addis 4, 2, .LzeroEqualityTest04.buffer2@toc@ha+8
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; CHECK-NEXT: ld 3, .LzeroEqualityTest04.buffer1@toc@l+8(3)
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; CHECK-NEXT: ld 4, .LzeroEqualityTest04.buffer2@toc@l+8(4)
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; CHECK-NEXT: xor. 3, 3, 4
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; CHECK-NEXT: beq 0, .LBB5_4
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; CHECK-NEXT: .LBB5_2: # %res_block
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; CHECK-NEXT: li 3, 1
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; CHECK-NEXT: .LBB5_3: # %endblock
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; CHECK-NEXT: cntlzw 3, 3
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; CHECK-NEXT: srwi 3, 3, 5
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; CHECK-NEXT: blr
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; CHECK-NEXT: .LBB5_4:
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; CHECK-NEXT: li 3, 0
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; CHECK-NEXT: b .LBB5_3
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2017-06-01 01:12:38 +08:00
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%call = tail call signext i32 @memcmp(i8* bitcast ([15 x i32]* @zeroEqualityTest04.buffer1 to i8*), i8* bitcast ([15 x i32]* @zeroEqualityTest04.buffer2 to i8*), i64 16)
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%not.tobool = icmp eq i32 %call, 0
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%cond = zext i1 %not.tobool to i32
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ret i32 %cond
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}
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