2018-06-27 06:20:04 +08:00
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// REQUIRES: x86
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2015-12-21 18:12:06 +08:00
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// RUN: llvm-mc -filetype=obj -triple=i686-pc-linux %s -o %t.o
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// RUN: ld.lld -static %t.o -o %tout
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// RUN: llvm-objdump -d %tout | FileCheck %s --check-prefix=DISASM
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2016-04-16 01:21:29 +08:00
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// RUN: llvm-readobj -r -symbols -sections %tout | FileCheck %s
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2015-12-21 18:12:06 +08:00
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// CHECK: Sections [
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// CHECK: Section {
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// CHECK: Index: 1
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// CHECK-NEXT: Name: .rel.plt
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// CHECK-NEXT: Type: SHT_REL
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// CHECK-NEXT: Flags [
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// CHECK-NEXT: SHF_ALLOC
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// CHECK-NEXT: ]
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// CHECK-NEXT: Address: [[RELA:.*]]
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// CHECK-NEXT: Offset: 0xD4
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// CHECK-NEXT: Size: 16
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2017-10-12 23:05:04 +08:00
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// CHECK-NEXT: Link: 0
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2015-12-21 18:12:06 +08:00
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// CHECK-NEXT: Info: 0
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// CHECK-NEXT: AddressAlignment: 4
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// CHECK-NEXT: EntrySize: 8
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// CHECK-NEXT: }
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// CHECK: Relocations [
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// CHECK-NEXT: Section ({{.*}}) .rel.plt {
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Align AArch64 and i386 image base to superpage
Summary:
As for x86_64, the default image base for AArch64 and i386 should be
aligned to a superpage appropriate for the architecture.
On AArch64, this is 2 MiB, on i386 it is 4 MiB.
Reviewers: emaste, grimar, javed.absar, espindola, ruiu, peter.smith, srhines, rprichard
Reviewed By: ruiu, peter.smith
Subscribers: jfb, markj, arichardson, krytarowski, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D50297
llvm-svn: 342746
2018-09-22 00:58:13 +08:00
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// CHECK-NEXT: 0x402000 R_386_IRELATIVE
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// CHECK-NEXT: 0x402004 R_386_IRELATIVE
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2015-12-21 18:12:06 +08:00
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// CHECK-NEXT: }
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// CHECK-NEXT: ]
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// CHECK: Symbols [
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// CHECK-NEXT: Symbol {
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// CHECK-NEXT: Name:
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// CHECK-NEXT: Value: 0x0
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// CHECK-NEXT: Size: 0
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// CHECK-NEXT: Binding: Local
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// CHECK-NEXT: Type: None
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// CHECK-NEXT: Other: 0
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// CHECK-NEXT: Section: Undefined
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// CHECK-NEXT: }
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// CHECK-NEXT: Symbol {
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// CHECK-NEXT: Name: __rel_iplt_end
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Align AArch64 and i386 image base to superpage
Summary:
As for x86_64, the default image base for AArch64 and i386 should be
aligned to a superpage appropriate for the architecture.
On AArch64, this is 2 MiB, on i386 it is 4 MiB.
Reviewers: emaste, grimar, javed.absar, espindola, ruiu, peter.smith, srhines, rprichard
Reviewed By: ruiu, peter.smith
Subscribers: jfb, markj, arichardson, krytarowski, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D50297
llvm-svn: 342746
2018-09-22 00:58:13 +08:00
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// CHECK-NEXT: Value: 0x4000E4
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2015-12-21 18:12:06 +08:00
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// CHECK-NEXT: Size: 0
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// CHECK-NEXT: Binding: Local
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// CHECK-NEXT: Type: None
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2016-04-04 22:04:16 +08:00
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// CHECK-NEXT: Other [
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// CHECK-NEXT: STV_HIDDEN
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// CHECK-NEXT: ]
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2016-04-12 03:14:59 +08:00
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// CHECK-NEXT: Section: .rel.plt
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2015-12-21 18:12:06 +08:00
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// CHECK-NEXT: }
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// CHECK-NEXT: Symbol {
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// CHECK-NEXT: Name: __rel_iplt_start
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// CHECK-NEXT: Value: [[RELA]]
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// CHECK-NEXT: Size: 0
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// CHECK-NEXT: Binding: Local
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// CHECK-NEXT: Type: None
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2016-04-04 22:04:16 +08:00
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// CHECK-NEXT: Other [
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// CHECK-NEXT: STV_HIDDEN
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// CHECK-NEXT: ]
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2016-04-12 03:14:59 +08:00
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// CHECK-NEXT: Section: .rel.plt
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2015-12-21 18:12:06 +08:00
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// CHECK-NEXT: }
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// CHECK-NEXT: Symbol {
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// CHECK-NEXT: Name: _start
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Align AArch64 and i386 image base to superpage
Summary:
As for x86_64, the default image base for AArch64 and i386 should be
aligned to a superpage appropriate for the architecture.
On AArch64, this is 2 MiB, on i386 it is 4 MiB.
Reviewers: emaste, grimar, javed.absar, espindola, ruiu, peter.smith, srhines, rprichard
Reviewed By: ruiu, peter.smith
Subscribers: jfb, markj, arichardson, krytarowski, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D50297
llvm-svn: 342746
2018-09-22 00:58:13 +08:00
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// CHECK-NEXT: Value: 0x401002
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2015-12-21 18:12:06 +08:00
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// CHECK-NEXT: Size: 0
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// CHECK-NEXT: Binding: Global
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// CHECK-NEXT: Type: None
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// CHECK-NEXT: Other: 0
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// CHECK-NEXT: Section: .text
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// CHECK-NEXT: }
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// CHECK-NEXT: Symbol {
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// CHECK-NEXT: Name: bar
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Align AArch64 and i386 image base to superpage
Summary:
As for x86_64, the default image base for AArch64 and i386 should be
aligned to a superpage appropriate for the architecture.
On AArch64, this is 2 MiB, on i386 it is 4 MiB.
Reviewers: emaste, grimar, javed.absar, espindola, ruiu, peter.smith, srhines, rprichard
Reviewed By: ruiu, peter.smith
Subscribers: jfb, markj, arichardson, krytarowski, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D50297
llvm-svn: 342746
2018-09-22 00:58:13 +08:00
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// CHECK-NEXT: Value: 0x401001
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2015-12-21 18:12:06 +08:00
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// CHECK-NEXT: Size: 0
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// CHECK-NEXT: Binding: Global
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// CHECK-NEXT: Type: GNU_IFunc
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// CHECK-NEXT: Other: 0
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// CHECK-NEXT: Section: .text
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// CHECK-NEXT: }
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// CHECK-NEXT: Symbol {
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// CHECK-NEXT: Name: foo
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Align AArch64 and i386 image base to superpage
Summary:
As for x86_64, the default image base for AArch64 and i386 should be
aligned to a superpage appropriate for the architecture.
On AArch64, this is 2 MiB, on i386 it is 4 MiB.
Reviewers: emaste, grimar, javed.absar, espindola, ruiu, peter.smith, srhines, rprichard
Reviewed By: ruiu, peter.smith
Subscribers: jfb, markj, arichardson, krytarowski, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D50297
llvm-svn: 342746
2018-09-22 00:58:13 +08:00
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// CHECK-NEXT: Value: 0x401000
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2015-12-21 18:12:06 +08:00
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// CHECK-NEXT: Size: 0
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// CHECK-NEXT: Binding: Global
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// CHECK-NEXT: Type: GNU_IFunc
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// CHECK-NEXT: Other: 0
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// CHECK-NEXT: Section: .text
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// CHECK-NEXT: }
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// CHECK-NEXT:]
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2016-12-08 20:58:55 +08:00
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// DISASM: Disassembly of section .text:
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2015-12-21 18:12:06 +08:00
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// DISASM-NEXT: foo:
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Align AArch64 and i386 image base to superpage
Summary:
As for x86_64, the default image base for AArch64 and i386 should be
aligned to a superpage appropriate for the architecture.
On AArch64, this is 2 MiB, on i386 it is 4 MiB.
Reviewers: emaste, grimar, javed.absar, espindola, ruiu, peter.smith, srhines, rprichard
Reviewed By: ruiu, peter.smith
Subscribers: jfb, markj, arichardson, krytarowski, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D50297
llvm-svn: 342746
2018-09-22 00:58:13 +08:00
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// DISASM-NEXT: 401000: c3 retl
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2016-12-08 20:58:55 +08:00
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// DISASM: bar:
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Align AArch64 and i386 image base to superpage
Summary:
As for x86_64, the default image base for AArch64 and i386 should be
aligned to a superpage appropriate for the architecture.
On AArch64, this is 2 MiB, on i386 it is 4 MiB.
Reviewers: emaste, grimar, javed.absar, espindola, ruiu, peter.smith, srhines, rprichard
Reviewed By: ruiu, peter.smith
Subscribers: jfb, markj, arichardson, krytarowski, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D50297
llvm-svn: 342746
2018-09-22 00:58:13 +08:00
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// DISASM-NEXT: 401001: c3 retl
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2015-12-21 18:12:06 +08:00
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// DISASM: _start:
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Align AArch64 and i386 image base to superpage
Summary:
As for x86_64, the default image base for AArch64 and i386 should be
aligned to a superpage appropriate for the architecture.
On AArch64, this is 2 MiB, on i386 it is 4 MiB.
Reviewers: emaste, grimar, javed.absar, espindola, ruiu, peter.smith, srhines, rprichard
Reviewed By: ruiu, peter.smith
Subscribers: jfb, markj, arichardson, krytarowski, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D50297
llvm-svn: 342746
2018-09-22 00:58:13 +08:00
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// DISASM-NEXT: 401002: e8 19 00 00 00 calll 25
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// DISASM-NEXT: 401007: e8 24 00 00 00 calll 36
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// DISASM-NEXT: 40100c: ba d4 00 40 00 movl $4194516, %edx
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// DISASM-NEXT: 401011: ba e4 00 40 00 movl $4194532, %edx
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2015-12-21 18:12:06 +08:00
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// DISASM-NEXT: Disassembly of section .plt:
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// DISASM-NEXT: .plt:
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Align AArch64 and i386 image base to superpage
Summary:
As for x86_64, the default image base for AArch64 and i386 should be
aligned to a superpage appropriate for the architecture.
On AArch64, this is 2 MiB, on i386 it is 4 MiB.
Reviewers: emaste, grimar, javed.absar, espindola, ruiu, peter.smith, srhines, rprichard
Reviewed By: ruiu, peter.smith
Subscribers: jfb, markj, arichardson, krytarowski, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D50297
llvm-svn: 342746
2018-09-22 00:58:13 +08:00
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// DISASM-NEXT: 401020: ff 25 00 20 40 00 jmpl *4202496
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// DISASM-NEXT: 401026: 68 10 00 00 00 pushl $16
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// DISASM-NEXT: 40102b: e9 e0 ff ff ff jmp -32 <_start+0xe>
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// DISASM-NEXT: 401030: ff 25 04 20 40 00 jmpl *4202500
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// DISASM-NEXT: 401036: 68 18 00 00 00 pushl $24
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// DISASM-NEXT: 40103b: e9 d0 ff ff ff jmp -48 <_start+0xe>
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2015-12-21 18:12:06 +08:00
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.text
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.type foo STT_GNU_IFUNC
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.globl foo
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foo:
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ret
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.type bar STT_GNU_IFUNC
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.globl bar
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bar:
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ret
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.globl _start
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_start:
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call foo
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call bar
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movl $__rel_iplt_start,%edx
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movl $__rel_iplt_end,%edx
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