forked from OSchip/llvm-project
87 lines
3.1 KiB
LLVM
87 lines
3.1 KiB
LLVM
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; RUN: opt %loadPolly -polly-scops -analyze < %s | FileCheck %s --check-prefix=AFFINE
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; RUN: opt %loadPolly -polly-scops -polly-allow-nonaffine -analyze < %s | FileCheck %s --check-prefix=NONAFFINE
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; The loop for.body => for.inc has an unpredictable iteration count could due to
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; the undef start value that it is compared to. Therefore the array element
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; %arrayidx101 that depends on that exit value cannot be affine.
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; Derived from test-suite/MultiSource/Benchmarks/BitBench/uuencode/uuencode.c
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define void @encode_line(i8* nocapture readonly %input, i32 %octets, i64 %p, i32 %n) {
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entry:
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br label %outer.for
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outer.for:
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%j = phi i32 [0, %entry], [%j.inc, %for.end]
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%j.cmp = icmp slt i32 %j, %n
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br i1 %j.cmp, label %for.body, label %exit
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for.body:
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%indvars.iv = phi i64 [ %indvars.iv.next, %for.inc ], [ %p, %outer.for ]
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%octets.addr.02 = phi i32 [ undef, %for.inc ], [ %octets, %outer.for ]
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br i1 false, label %for.inc, label %if.else
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if.else:
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%cond = icmp eq i32 %octets.addr.02, 2
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br i1 %cond, label %if.then84, label %for.end
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if.then84:
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%0 = add nsw i64 %indvars.iv, 1
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%arrayidx101 = getelementptr inbounds i8, i8* %input, i64 %0
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store i8 42, i8* %arrayidx101, align 1
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br label %for.end
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for.inc:
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%cmp = icmp sgt i32 %octets.addr.02, 3
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%indvars.iv.next = add nsw i64 %indvars.iv, 3
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br i1 %cmp, label %for.body, label %for.end
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for.end:
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%j.inc = add nuw nsw i32 %j, 1
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br label %outer.for
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exit:
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br label %return
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return:
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ret void
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}
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; AFFINE: Region: %if.else---%for.end
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; AFFINE: Statements {
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; AFFINE-NEXT: Stmt_if_then84
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; AFFINE-NEXT: Domain :=
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; AFFINE-NEXT: [octets, p_1, p] -> { Stmt_if_then84[] : octets = 2 };
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; AFFINE-NEXT: Schedule :=
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; AFFINE-NEXT: [octets, p_1, p] -> { Stmt_if_then84[] -> [] };
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; AFFINE-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; AFFINE-NEXT: [octets, p_1, p] -> { Stmt_if_then84[] -> MemRef_input[1 + p] };
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; AFFINE-NEXT: }
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; NONAFFINE: Region: %outer.for---%return
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; NONAFFINE: Statements {
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; NONAFFINE-NEXT: Stmt_for_body
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; NONAFFINE-NEXT: Domain :=
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; NONAFFINE-NEXT: [n, octets] -> { Stmt_for_body[i0, 0] : 0 <= i0 < n };
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; NONAFFINE-NEXT: Schedule :=
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; NONAFFINE-NEXT: [n, octets] -> { Stmt_for_body[i0, i1] -> [i0, 0, 0] };
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; NONAFFINE-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
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; NONAFFINE-NEXT: [n, octets] -> { Stmt_for_body[i0, i1] -> MemRef_indvars_iv[] };
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; NONAFFINE-NEXT: Stmt_if_then84
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; NONAFFINE-NEXT: Domain :=
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; NONAFFINE-NEXT: [n, octets] -> { Stmt_if_then84[i0] : octets = 2 and 0 <= i0 < n };
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; NONAFFINE-NEXT: Schedule :=
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; NONAFFINE-NEXT: [n, octets] -> { Stmt_if_then84[i0] -> [i0, 1, 0] };
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; NONAFFINE-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
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; NONAFFINE-NEXT: [n, octets] -> { Stmt_if_then84[i0] -> MemRef_indvars_iv[] };
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; NONAFFINE-NEXT: MayWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; NONAFFINE-NEXT: [n, octets] -> { Stmt_if_then84[i0] -> MemRef_input[o0] };
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; NONAFFINE-NEXT: }
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