2019-08-20 21:25:55 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx,fma | FileCheck %s --check-prefixes=CHECK,FMA3
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; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx,fma4 | FileCheck %s --check-prefixes=CHECK,FMA4
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define float @test_fneg_fma_subx_y_negz_f32(float %w, float %x, float %y, float %z) {
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; FMA3-LABEL: test_fneg_fma_subx_y_negz_f32:
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; FMA3: # %bb.0: # %entry
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2019-08-23 18:49:46 +08:00
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; FMA3-NEXT: vsubss %xmm0, %xmm1, %xmm0
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; FMA3-NEXT: vfmadd213ss {{.*#+}} xmm0 = (xmm2 * xmm0) + xmm3
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2019-08-20 21:25:55 +08:00
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; FMA3-NEXT: retq
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;
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; FMA4-LABEL: test_fneg_fma_subx_y_negz_f32:
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; FMA4: # %bb.0: # %entry
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2019-08-23 18:49:46 +08:00
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; FMA4-NEXT: vsubss %xmm0, %xmm1, %xmm0
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; FMA4-NEXT: vfmaddss %xmm3, %xmm2, %xmm0, %xmm0
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2019-08-20 21:25:55 +08:00
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; FMA4-NEXT: retq
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entry:
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%subx = fsub nsz float %w, %x
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%negz = fsub float -0.000000e+00, %z
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%0 = tail call nsz float @llvm.fma.f32(float %subx, float %y, float %negz)
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%1 = fsub float -0.000000e+00, %0
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ret float %1
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}
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define float @test_fneg_fma_x_suby_negz_f32(float %w, float %x, float %y, float %z) {
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; FMA3-LABEL: test_fneg_fma_x_suby_negz_f32:
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; FMA3: # %bb.0: # %entry
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2019-08-23 18:49:46 +08:00
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; FMA3-NEXT: vsubss %xmm0, %xmm2, %xmm0
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; FMA3-NEXT: vfmadd213ss {{.*#+}} xmm0 = (xmm1 * xmm0) + xmm3
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2019-08-20 21:25:55 +08:00
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; FMA3-NEXT: retq
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;
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; FMA4-LABEL: test_fneg_fma_x_suby_negz_f32:
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; FMA4: # %bb.0: # %entry
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2019-08-23 18:49:46 +08:00
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; FMA4-NEXT: vsubss %xmm0, %xmm2, %xmm0
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; FMA4-NEXT: vfmaddss %xmm3, %xmm0, %xmm1, %xmm0
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2019-08-20 21:25:55 +08:00
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; FMA4-NEXT: retq
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entry:
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%suby = fsub nsz float %w, %y
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%negz = fsub float -0.000000e+00, %z
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%0 = tail call nsz float @llvm.fma.f32(float %x, float %suby, float %negz)
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%1 = fsub float -0.000000e+00, %0
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ret float %1
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}
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define float @test_fneg_fma_subx_suby_negz_f32(float %w, float %x, float %y, float %z) {
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; FMA3-LABEL: test_fneg_fma_subx_suby_negz_f32:
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; FMA3: # %bb.0: # %entry
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2019-08-23 18:49:46 +08:00
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; FMA3-NEXT: vsubss %xmm0, %xmm1, %xmm1
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2019-08-20 21:25:55 +08:00
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; FMA3-NEXT: vsubss %xmm2, %xmm0, %xmm0
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2019-08-23 18:49:46 +08:00
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; FMA3-NEXT: vfmadd213ss {{.*#+}} xmm0 = (xmm1 * xmm0) + xmm3
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2019-08-20 21:25:55 +08:00
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; FMA3-NEXT: retq
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;
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; FMA4-LABEL: test_fneg_fma_subx_suby_negz_f32:
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; FMA4: # %bb.0: # %entry
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2019-08-23 18:49:46 +08:00
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; FMA4-NEXT: vsubss %xmm0, %xmm1, %xmm1
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2019-08-20 21:25:55 +08:00
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; FMA4-NEXT: vsubss %xmm2, %xmm0, %xmm0
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2019-08-23 18:49:46 +08:00
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; FMA4-NEXT: vfmaddss %xmm3, %xmm0, %xmm1, %xmm0
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2019-08-20 21:25:55 +08:00
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; FMA4-NEXT: retq
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entry:
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%subx = fsub nsz float %w, %x
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%suby = fsub nsz float %w, %y
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%negz = fsub float -0.000000e+00, %z
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%0 = tail call nsz float @llvm.fma.f32(float %subx, float %suby, float %negz)
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%1 = fsub float -0.000000e+00, %0
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ret float %1
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}
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define float @test_fneg_fma_subx_negy_negz_f32(float %w, float %x, float %y, float %z) {
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; FMA3-LABEL: test_fneg_fma_subx_negy_negz_f32:
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; FMA3: # %bb.0: # %entry
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; FMA3-NEXT: vsubss %xmm1, %xmm0, %xmm0
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; FMA3-NEXT: vfmadd213ss {{.*#+}} xmm0 = (xmm2 * xmm0) + xmm3
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; FMA3-NEXT: retq
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;
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; FMA4-LABEL: test_fneg_fma_subx_negy_negz_f32:
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; FMA4: # %bb.0: # %entry
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; FMA4-NEXT: vsubss %xmm1, %xmm0, %xmm0
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; FMA4-NEXT: vfmaddss %xmm3, %xmm2, %xmm0, %xmm0
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; FMA4-NEXT: retq
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entry:
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%subx = fsub nsz float %w, %x
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%negy = fsub float -0.000000e+00, %y
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%negz = fsub float -0.000000e+00, %z
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%0 = tail call nsz float @llvm.fma.f32(float %subx, float %negy, float %negz)
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%1 = fsub float -0.000000e+00, %0
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ret float %1
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}
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declare float @llvm.fma.f32(float, float, float)
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