llvm-project/llvm/test/CodeGen/X86/GlobalISel/select-memop-scalar-x32.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=i386-linux-gnu  -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL

--- |
  define i8 @test_load_i8(i8* %p1) {
    %r = load i8, i8* %p1
    ret i8 %r
  }

  define i16 @test_load_i16(i16* %p1) {
    %r = load i16, i16* %p1
    ret i16 %r
  }

  define i32 @test_load_i32(i32* %p1) {
    %r = load i32, i32* %p1
    ret i32 %r
  }

  define i8* @test_store_i8(i8 %val, i8* %p1) {
    store i8 %val, i8* %p1
    ret i8* %p1
  }

  define i16* @test_store_i16(i16 %val, i16* %p1) {
    store i16 %val, i16* %p1
    ret i16* %p1
  }

  define i32* @test_store_i32(i32 %val, i32* %p1) {
    store i32 %val, i32* %p1
    ret i32* %p1
  }

  define i32* @test_load_ptr(i32** %ptr1) {
    %p = load i32*, i32** %ptr1
    ret i32* %p
  }

  define void @test_store_ptr(i32** %ptr1, i32* %a) {
    store i32* %a, i32** %ptr1
    ret void
  }

...
---
name:            test_load_i8
alignment:       4
legalized:       true
regBankSelected: true
registers:
  - { id: 0, class: gpr }
  - { id: 1, class: gpr }
  - { id: 2, class: gpr }
fixedStack:
  - { id: 0, offset: 0, size: 4, alignment: 16, isImmutable: true, isAliased: false }
body:             |
  bb.1 (%ir-block.0):
    ; ALL-LABEL: name: test_load_i8
    ; ALL: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (invariant load 4 from %fixed-stack.0, align 16)
    ; ALL: [[MOV8rm:%[0-9]+]]:gr8 = MOV8rm [[MOV32rm]], 1, $noreg, 0, $noreg :: (load 1 from %ir.p1)
    ; ALL: $al = COPY [[MOV8rm]]
    ; ALL: RET 0, implicit $al
    %1(p0) = G_FRAME_INDEX %fixed-stack.0
    %0(p0) = G_LOAD %1(p0) :: (invariant load 4 from %fixed-stack.0, align 16)
    %2(s8) = G_LOAD %0(p0) :: (load 1 from %ir.p1)
    $al = COPY %2(s8)
    RET 0, implicit $al

...
---
name:            test_load_i16
alignment:       4
legalized:       true
regBankSelected: true
registers:
  - { id: 0, class: gpr }
  - { id: 1, class: gpr }
  - { id: 2, class: gpr }
fixedStack:
  - { id: 0, offset: 0, size: 4, alignment: 16, isImmutable: true, isAliased: false }
body:             |
  bb.1 (%ir-block.0):
    ; ALL-LABEL: name: test_load_i16
    ; ALL: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (invariant load 4 from %fixed-stack.0, align 16)
    ; ALL: [[MOV16rm:%[0-9]+]]:gr16 = MOV16rm [[MOV32rm]], 1, $noreg, 0, $noreg :: (load 2 from %ir.p1)
    ; ALL: $ax = COPY [[MOV16rm]]
    ; ALL: RET 0, implicit $ax
    %1(p0) = G_FRAME_INDEX %fixed-stack.0
    %0(p0) = G_LOAD %1(p0) :: (invariant load 4 from %fixed-stack.0, align 16)
    %2(s16) = G_LOAD %0(p0) :: (load 2 from %ir.p1)
    $ax = COPY %2(s16)
    RET 0, implicit $ax

...
---
name:            test_load_i32
alignment:       4
legalized:       true
regBankSelected: true
registers:
  - { id: 0, class: gpr }
  - { id: 1, class: gpr }
  - { id: 2, class: gpr }
fixedStack:
  - { id: 0, offset: 0, size: 4, alignment: 16, isImmutable: true, isAliased: false }
body:             |
  bb.1 (%ir-block.0):
    ; ALL-LABEL: name: test_load_i32
    ; ALL: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (invariant load 4 from %fixed-stack.0, align 16)
    ; ALL: [[MOV32rm1:%[0-9]+]]:gr32 = MOV32rm [[MOV32rm]], 1, $noreg, 0, $noreg :: (load 4 from %ir.p1)
    ; ALL: $eax = COPY [[MOV32rm1]]
    ; ALL: RET 0, implicit $eax
    %1(p0) = G_FRAME_INDEX %fixed-stack.0
    %0(p0) = G_LOAD %1(p0) :: (invariant load 4 from %fixed-stack.0, align 16)
    %2(s32) = G_LOAD %0(p0) :: (load 4 from %ir.p1)
    $eax = COPY %2(s32)
    RET 0, implicit $eax

...
---
name:            test_store_i8
alignment:       4
legalized:       true
regBankSelected: true
registers:
  - { id: 0, class: gpr }
  - { id: 1, class: gpr }
  - { id: 2, class: gpr }
  - { id: 3, class: gpr }
fixedStack:
  - { id: 0, offset: 4, size: 4, alignment: 4, isImmutable: true, isAliased: false }
  - { id: 1, offset: 0, size: 1, alignment: 16, isImmutable: true, isAliased: false }
body:             |
  bb.1 (%ir-block.0):
    ; ALL-LABEL: name: test_store_i8
    ; ALL: [[MOV8rm:%[0-9]+]]:gr8 = MOV8rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (invariant load 1 from %fixed-stack.0, align 16)
    ; ALL: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.1, 1, $noreg, 0, $noreg :: (invariant load 4 from %fixed-stack.1)
    ; ALL: MOV8mr [[MOV32rm]], 1, $noreg, 0, $noreg, [[MOV8rm]] :: (store 1 into %ir.p1)
    ; ALL: $eax = COPY [[MOV32rm]]
    ; ALL: RET 0, implicit $eax
    %2(p0) = G_FRAME_INDEX %fixed-stack.1
    %0(s8) = G_LOAD %2(p0) :: (invariant load 1 from %fixed-stack.1, align 16)
    %3(p0) = G_FRAME_INDEX %fixed-stack.0
    %1(p0) = G_LOAD %3(p0) :: (invariant load 4 from %fixed-stack.0, align 4)
    G_STORE %0(s8), %1(p0) :: (store 1 into %ir.p1)
    $eax = COPY %1(p0)
    RET 0, implicit $eax

...
---
name:            test_store_i16
alignment:       4
legalized:       true
regBankSelected: true
registers:
  - { id: 0, class: gpr }
  - { id: 1, class: gpr }
  - { id: 2, class: gpr }
  - { id: 3, class: gpr }
fixedStack:
  - { id: 0, offset: 4, size: 4, alignment: 4, isImmutable: true, isAliased: false }
  - { id: 1, offset: 0, size: 2, alignment: 16, isImmutable: true, isAliased: false }
body:             |
  bb.1 (%ir-block.0):
    ; ALL-LABEL: name: test_store_i16
    ; ALL: [[MOV16rm:%[0-9]+]]:gr16 = MOV16rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (invariant load 2 from %fixed-stack.0, align 16)
    ; ALL: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.1, 1, $noreg, 0, $noreg :: (invariant load 4 from %fixed-stack.1)
    ; ALL: MOV16mr [[MOV32rm]], 1, $noreg, 0, $noreg, [[MOV16rm]] :: (store 2 into %ir.p1)
    ; ALL: $eax = COPY [[MOV32rm]]
    ; ALL: RET 0, implicit $eax
    %2(p0) = G_FRAME_INDEX %fixed-stack.1
    %0(s16) = G_LOAD %2(p0) :: (invariant load 2 from %fixed-stack.1, align 16)
    %3(p0) = G_FRAME_INDEX %fixed-stack.0
    %1(p0) = G_LOAD %3(p0) :: (invariant load 4 from %fixed-stack.0, align 4)
    G_STORE %0(s16), %1(p0) :: (store 2 into %ir.p1)
    $eax = COPY %1(p0)
    RET 0, implicit $eax

...
---
name:            test_store_i32
alignment:       4
legalized:       true
regBankSelected: true
registers:
  - { id: 0, class: gpr }
  - { id: 1, class: gpr }
  - { id: 2, class: gpr }
  - { id: 3, class: gpr }
fixedStack:
  - { id: 0, offset: 4, size: 4, alignment: 4, isImmutable: true, isAliased: false }
  - { id: 1, offset: 0, size: 4, alignment: 16, isImmutable: true, isAliased: false }
body:             |
  bb.1 (%ir-block.0):
    ; ALL-LABEL: name: test_store_i32
    ; ALL: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (invariant load 4 from %fixed-stack.0, align 16)
    ; ALL: [[MOV32rm1:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.1, 1, $noreg, 0, $noreg :: (invariant load 4 from %fixed-stack.1)
    ; ALL: MOV32mr [[MOV32rm1]], 1, $noreg, 0, $noreg, [[MOV32rm]] :: (store 4 into %ir.p1)
    ; ALL: $eax = COPY [[MOV32rm1]]
    ; ALL: RET 0, implicit $eax
    %2(p0) = G_FRAME_INDEX %fixed-stack.1
    %0(s32) = G_LOAD %2(p0) :: (invariant load 4 from %fixed-stack.1, align 16)
    %3(p0) = G_FRAME_INDEX %fixed-stack.0
    %1(p0) = G_LOAD %3(p0) :: (invariant load 4 from %fixed-stack.0, align 4)
    G_STORE %0(s32), %1(p0) :: (store 4 into %ir.p1)
    $eax = COPY %1(p0)
    RET 0, implicit $eax

...
---
name:            test_load_ptr
alignment:       4
legalized:       true
regBankSelected: true
registers:
  - { id: 0, class: gpr }
  - { id: 1, class: gpr }
  - { id: 2, class: gpr }
fixedStack:
  - { id: 0, offset: 0, size: 4, alignment: 16, isImmutable: true, isAliased: false }
body:             |
  bb.1 (%ir-block.0):
    ; ALL-LABEL: name: test_load_ptr
    ; ALL: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (invariant load 4 from %fixed-stack.0, align 16)
    ; ALL: [[MOV32rm1:%[0-9]+]]:gr32 = MOV32rm [[MOV32rm]], 1, $noreg, 0, $noreg :: (load 4 from %ir.ptr1)
    ; ALL: $eax = COPY [[MOV32rm1]]
    ; ALL: RET 0, implicit $eax
    %1(p0) = G_FRAME_INDEX %fixed-stack.0
    %0(p0) = G_LOAD %1(p0) :: (invariant load 4 from %fixed-stack.0, align 16)
    %2(p0) = G_LOAD %0(p0) :: (load 4 from %ir.ptr1)
    $eax = COPY %2(p0)
    RET 0, implicit $eax

...
---
name:            test_store_ptr
alignment:       4
legalized:       true
regBankSelected: true
registers:
  - { id: 0, class: gpr }
  - { id: 1, class: gpr }
  - { id: 2, class: gpr }
  - { id: 3, class: gpr }
fixedStack:
  - { id: 0, offset: 4, size: 4, alignment: 4, isImmutable: true, isAliased: false }
  - { id: 1, offset: 0, size: 4, alignment: 16, isImmutable: true, isAliased: false }
body:             |
  bb.1 (%ir-block.0):
    ; ALL-LABEL: name: test_store_ptr
    ; ALL: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (invariant load 4 from %fixed-stack.0, align 16)
    ; ALL: [[MOV32rm1:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.1, 1, $noreg, 0, $noreg :: (invariant load 4 from %fixed-stack.1)
    ; ALL: MOV32mr [[MOV32rm]], 1, $noreg, 0, $noreg, [[MOV32rm1]] :: (store 4 into %ir.ptr1)
    ; ALL: RET 0
    %2(p0) = G_FRAME_INDEX %fixed-stack.1
    %0(p0) = G_LOAD %2(p0) :: (invariant load 4 from %fixed-stack.1, align 16)
    %3(p0) = G_FRAME_INDEX %fixed-stack.0
    %1(p0) = G_LOAD %3(p0) :: (invariant load 4 from %fixed-stack.0, align 4)
    G_STORE %1(p0), %0(p0) :: (store 4 into %ir.ptr1)
    RET 0

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