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llvm-project/llvm/test/CodeGen/ARM/crash-greedy.ll

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Replace "no-frame-pointer-*" function attributes with "frame-pointer" Part of the effort to refactoring frame pointer code generation. We used to use two function attributes "no-frame-pointer-elim" and "no-frame-pointer-elim-non-leaf" to represent three kinds of frame pointer usage: (all) frames use frame pointer, (non-leaf) frames use frame pointer, (none) frame use frame pointer. This CL makes the idea explicit by using only one enum function attribute "frame-pointer" Option "-frame-pointer=" replaces "-disable-fp-elim" for tools such as llc. "no-frame-pointer-elim" and "no-frame-pointer-elim-non-leaf" are still supported for easy migration to "frame-pointer". tests are mostly updated with // replace command line args ‘-disable-fp-elim=false’ with ‘-frame-pointer=none’ grep -iIrnl '\-disable-fp-elim=false' * | xargs sed -i '' -e "s/-disable-fp-elim=false/-frame-pointer=none/g" // replace command line args ‘-disable-fp-elim’ with ‘-frame-pointer=all’ grep -iIrnl '\-disable-fp-elim' * | xargs sed -i '' -e "s/-disable-fp-elim/-frame-pointer=all/g" Patch by Yuanfang Chen (tabloid.adroit)! Differential Revision: https://reviews.llvm.org/D56351 llvm-svn: 351049
2019-01-14 18:55:55 +08:00
; RUN: llc < %s -regalloc=greedy -mcpu=cortex-a8 -relocation-model=pic -frame-pointer=all -verify-machineinstrs | FileCheck %s
Pick a conservative register class when creating a small live range for remat. The rematerialized instruction may require a more constrained register class than the register being spilled. In the test case, the spilled register has been inflated to the DPR register class, but we are rematerializing a load of the ssub_0 sub-register which only exists for DPR_VFP2 registers. The register class is reinflated after spilling, so the conservative choice is only temporary. llvm-svn: 128610
2011-03-31 11:54:44 +08:00
;
; ARM tests that crash or fail with the greedy register allocator.
target triple = "thumbv7-apple-darwin"
declare double @exp(double)
Make tests more useful. lit needs a linter ... llvm-svn: 130126
2011-04-25 18:12:01 +08:00
; CHECK: remat_subreg
[NFC] Make tests more robust for new optimizations llvm-svn: 361697
2019-05-25 22:10:20 +08:00
define void @remat_subreg(float* nocapture %x, i32* %y, i32 %n, i32 %z, float %c, float %lambda, float* nocapture %ret_f, float* nocapture %ret_df, i1 %cond) nounwind {
Pick a conservative register class when creating a small live range for remat. The rematerialized instruction may require a more constrained register class than the register being spilled. In the test case, the spilled register has been inflated to the DPR register class, but we are rematerializing a load of the ssub_0 sub-register which only exists for DPR_VFP2 registers. The register class is reinflated after spilling, so the conservative choice is only temporary. llvm-svn: 128610
2011-03-31 11:54:44 +08:00
entry:
%conv16 = fpext float %lambda to double
%mul17 = fmul double %conv16, -1.000000e+00
[NFC] Make tests more robust for new optimizations llvm-svn: 361697
2019-05-25 22:10:20 +08:00
br i1 %cond, label %cond.end.us, label %cond.end
Pick a conservative register class when creating a small live range for remat. The rematerialized instruction may require a more constrained register class than the register being spilled. In the test case, the spilled register has been inflated to the DPR register class, but we are rematerializing a load of the ssub_0 sub-register which only exists for DPR_VFP2 registers. The register class is reinflated after spilling, so the conservative choice is only temporary. llvm-svn: 128610
2011-03-31 11:54:44 +08:00
cond.end.us: ; preds = %entry
unreachable
cond.end: ; preds = %cond.end, %entry
%mul = fmul double undef, 0.000000e+00
%add = fadd double undef, %mul
%add46 = fadd double undef, undef
%add75 = fadd double 0.000000e+00, undef
br i1 undef, label %for.end, label %cond.end
for.end: ; preds = %cond.end
%conv78 = sitofp i32 %z to double
%conv83 = fpext float %c to double
%mul84 = fmul double %mul17, %conv83
%call85 = tail call double @exp(double %mul84) nounwind
%mul86 = fmul double %conv78, %call85
%add88 = fadd double 0.000000e+00, %mul86
ARM: stop emitting blx instructions for most calls on MachO. I'm really not sure why we were in the first place, it's the linker's job to convert between BL/BLX as necessary. Even worse, using BLX left Thumb calls that could be locally resolved completely unencodable since all offsets to BLX are multiples of 4. rdar://26182344 llvm-svn: 269101
2016-05-11 03:17:47 +08:00
; CHECK: bl _exp
Pick a conservative register class when creating a small live range for remat. The rematerialized instruction may require a more constrained register class than the register being spilled. In the test case, the spilled register has been inflated to the DPR register class, but we are rematerializing a load of the ssub_0 sub-register which only exists for DPR_VFP2 registers. The register class is reinflated after spilling, so the conservative choice is only temporary. llvm-svn: 128610
2011-03-31 11:54:44 +08:00
%call100 = tail call double @exp(double %mul84) nounwind
%mul101 = fmul double undef, %call100
%add103 = fadd double %add46, %mul101
%mul111 = fmul double undef, %conv83
%mul119 = fmul double %mul111, undef
%add121 = fadd double undef, %mul119
%div = fdiv double 1.000000e+00, %conv16
%div126 = fdiv double %add, %add75
%sub = fsub double %div, %div126
%div129 = fdiv double %add103, %add88
%add130 = fadd double %sub, %div129
%conv131 = fptrunc double %add130 to float
store float %conv131, float* %ret_f, align 4
%mul139 = fmul double %div129, %div129
%div142 = fdiv double %add121, %add88
%sub143 = fsub double %mul139, %div142
; %lambda is passed on the stack, and the stack slot load is rematerialized.
; The rematted load of a float constrains the D register used for the mul.
; CHECK: vldr
%mul146 = fmul float %lambda, %lambda
%conv147 = fpext float %mul146 to double
%div148 = fdiv double 1.000000e+00, %conv147
%sub149 = fsub double %sub143, %div148
%conv150 = fptrunc double %sub149 to float
store float %conv150, float* %ret_df, align 4
ret void
}
Also add <imp-def> operands for defined and dead super-registers when rewriting. We cannot rely on the <imp-def> operands added by LiveIntervals in all cases as demonstrated by the test case. llvm-svn: 130313
2011-04-28 01:42:31 +08:00
; CHECK: insert_elem
; This test has a sub-register copy with a kill flag:
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register. Work towards the unification of MIR and debug output by refactoring the interfaces. For MachineOperand::print, keep a simple version that can be easily called from `dump()`, and a more complex one which will be called from both the MIRPrinter and MachineInstr::print. Add extra checks inside MachineOperand for detached operands (operands with getParent() == nullptr). https://reviews.llvm.org/D40836 * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" \) -type f -print0 | xargs -0 sed -i '' -E 's/kill: ([^ ]+) ([^ ]+)<def> ([^ ]+)/kill: \1 def \2 \3/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" \) -type f -print0 | xargs -0 sed -i '' -E 's/kill: ([^ ]+) ([^ ]+) ([^ ]+)<def>/kill: \1 \2 def \3/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" \) -type f -print0 | xargs -0 sed -i '' -E 's/kill: def ([^ ]+) ([^ ]+) ([^ ]+)<def>/kill: def \1 \2 def \3/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" \) -type f -print0 | xargs -0 sed -i '' -E 's/<def>//g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" \) -type f -print0 | xargs -0 sed -i '' -E 's/([^ ]+)<kill>/killed \1/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" \) -type f -print0 | xargs -0 sed -i '' -E 's/([^ ]+)<imp-use,kill>/implicit killed \1/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" \) -type f -print0 | xargs -0 sed -i '' -E 's/([^ ]+)<dead>/dead \1/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" \) -type f -print0 | xargs -0 sed -i '' -E 's/([^ ]+)<def[ ]*,[ ]*dead>/dead \1/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" \) -type f -print0 | xargs -0 sed -i '' -E 's/([^ ]+)<imp-def[ ]*,[ ]*dead>/implicit-def dead \1/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" \) -type f -print0 | xargs -0 sed -i '' -E 's/([^ ]+)<imp-def>/implicit-def \1/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" \) -type f -print0 | xargs -0 sed -i '' -E 's/([^ ]+)<imp-use>/implicit \1/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" \) -type f -print0 | xargs -0 sed -i '' -E 's/([^ ]+)<internal>/internal \1/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" \) -type f -print0 | xargs -0 sed -i '' -E 's/([^ ]+)<undef>/undef \1/g' llvm-svn: 320022
2017-12-07 18:40:31 +08:00
; %6:ssub_3 = COPY killed %6:ssub_2; QPR_VFP2:%6
Also add <imp-def> operands for defined and dead super-registers when rewriting. We cannot rely on the <imp-def> operands added by LiveIntervals in all cases as demonstrated by the test case. llvm-svn: 130313
2011-04-28 01:42:31 +08:00
; The rewriter must do something sensible with that, or the scavenger crashes.
define void @insert_elem() nounwind {
entry:
br i1 undef, label %if.end251, label %if.then84
if.then84: ; preds = %entry
br i1 undef, label %if.end251, label %if.then195
if.then195: ; preds = %if.then84
%div = fdiv float 1.000000e+00, undef
%vecinit207 = insertelement <4 x float> undef, float %div, i32 1
%vecinit208 = insertelement <4 x float> %vecinit207, float 1.000000e+00, i32 2
%vecinit209 = insertelement <4 x float> %vecinit208, float 1.000000e+00, i32 3
%mul216 = fmul <4 x float> zeroinitializer, %vecinit209
store <4 x float> %mul216, <4 x float>* undef, align 16
br label %if.end251
if.end251: ; preds = %if.then195, %if.then84, %entry
ret void
}
Clear kill flags in removeCopyByCommutingDef(). We are extending live ranges, so kill flags are not accurate. They aren't needed until they are recomputed after RA anyway. <rdar://problem/11950722> llvm-svn: 161023
2012-07-31 10:47:24 +08:00
; Coalescer failure: removeCopyByCommutingDef leaves a bad kill flag
; behind.
define void @rdar11950722() nounwind readonly optsize ssp align 2 {
entry:
br i1 undef, label %land.lhs.true7, label %lor.lhs.false.i
lor.lhs.false.i:
br i1 undef, label %if.then10.i, label %land.lhs.true7
if.then10.i:
%xFlags.1.i = select i1 undef, i32 0, i32 undef
br i1 undef, label %land.lhs.true33.i, label %f.exit
land.lhs.true33.i:
%and26.i = and i32 %xFlags.1.i, 8
%cmp27.i = icmp eq i32 %and26.i, 0
%and29.i = and i32 %xFlags.1.i, 2147483645
%xFlags.1.and29.i = select i1 %cmp27.i, i32 %xFlags.1.i, i32 %and29.i
%and34.i = and i32 %xFlags.1.i, 8
%cmp35.i = icmp eq i32 %and34.i, 0
%and37.i = and i32 %xFlags.1.i, 2147483645
%yFlags.1.and37.i = select i1 %cmp35.i, i32 %xFlags.1.i, i32 %and37.i
br label %f.exit
f.exit:
%xFlags.3.i = phi i32 [ %xFlags.1.and29.i, %land.lhs.true33.i ], [ %xFlags.1.i, %if.then10.i ]
%yFlags.2.i = phi i32 [ %yFlags.1.and37.i, %land.lhs.true33.i ], [ %xFlags.1.i, %if.then10.i ]
%cmp40.i = icmp eq i32 %xFlags.3.i, %yFlags.2.i
br i1 %cmp40.i, label %land.lhs.true7, label %land.end
land.lhs.true7:
br i1 undef, label %land.lhs.true34, label %lor.lhs.false27
lor.lhs.false27:
br i1 undef, label %land.lhs.true34, label %land.end
land.lhs.true34:
br i1 undef, label %land.end, label %lor.lhs.false44
lor.lhs.false44:
ret void
land.end:
ret void
}