maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity
llvm-project/llvm/test/CodeGen/Lanai/lanai-misched-trivial-disjo...

57 lines
2.0 KiB
LLVM
Raw Normal View History

Add a REQUIRES: assert on a Lanai test that uses a -debug-only flag llvm-svn: 277204
2016-07-30 03:35:22 +08:00
; REQUIRES: asserts
CodeGen: Rename DEBUG_TYPE to match passnames Rename the DEBUG_TYPE to match the names of corresponding passes where it makes sense. Also establish the pattern of simply referencing DEBUG_TYPE instead of repeating the passname where possible. llvm-svn: 303921
2017-05-26 05:26:32 +08:00
; RUN: llc %s -mtriple=lanai-unknown-unknown -debug-only=machine-scheduler -o /dev/null 2>&1 | FileCheck %s
[lanai] Add areMemAccessesTriviallyDisjoint, getMemOpBaseRegImmOfs and getMemOpBaseRegImmOfsWidth. Summary: Add getMemOpBaseRegImmOfsWidth to enable determining independence during MiSched. Reviewers: eliben, majnemer Subscribers: mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D18903 llvm-svn: 266338
2016-04-15 00:47:42 +08:00
; Make sure there are no control dependencies between memory operations that
; are trivially disjoint.
; Function Attrs: norecurse nounwind uwtable
define i32 @foo(i8* inreg nocapture %x) {
entry:
%0 = bitcast i8* %x to i32*
store i32 1, i32* %0, align 4
%arrayidx1 = getelementptr inbounds i8, i8* %x, i32 4
%1 = bitcast i8* %arrayidx1 to i32*
store i32 2, i32* %1, align 4
%arrayidx2 = getelementptr inbounds i8, i8* %x, i32 12
%2 = bitcast i8* %arrayidx2 to i32*
%3 = load i32, i32* %2, align 4
%arrayidx3 = getelementptr inbounds i8, i8* %x, i32 10
%4 = bitcast i8* %arrayidx3 to i16*
store i16 3, i16* %4, align 2
%5 = bitcast i8* %arrayidx2 to i16*
store i16 4, i16* %5, align 2
%arrayidx5 = getelementptr inbounds i8, i8* %x, i32 14
store i8 5, i8* %arrayidx5, align 1
%arrayidx6 = getelementptr inbounds i8, i8* %x, i32 15
store i8 6, i8* %arrayidx6, align 1
%arrayidx7 = getelementptr inbounds i8, i8* %x, i32 16
store i8 7, i8* %arrayidx7, align 1
ret i32 %3
}
; CHECK-LABEL: foo
; CHECK-LABEL: SU({{.*}}): SW_RI{{.*}}, 0,
; CHECK: # preds left : 2
; CHECK: # succs left : 0
; CHECK-LABEL: SU({{.*}}): SW_RI{{.*}}, 4,
; CHECK: # preds left : 2
; CHECK: # succs left : 0
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register. Work towards the unification of MIR and debug output by refactoring the interfaces. For MachineOperand::print, keep a simple version that can be easily called from `dump()`, and a more complex one which will be called from both the MIRPrinter and MachineInstr::print. Add extra checks inside MachineOperand for detached operands (operands with getParent() == nullptr). https://reviews.llvm.org/D40836 * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" \) -type f -print0 | xargs -0 sed -i '' -E 's/kill: ([^ ]+) ([^ ]+)<def> ([^ ]+)/kill: \1 def \2 \3/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" \) -type f -print0 | xargs -0 sed -i '' -E 's/kill: ([^ ]+) ([^ ]+) ([^ ]+)<def>/kill: \1 \2 def \3/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" \) -type f -print0 | xargs -0 sed -i '' -E 's/kill: def ([^ ]+) ([^ ]+) ([^ ]+)<def>/kill: def \1 \2 def \3/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" \) -type f -print0 | xargs -0 sed -i '' -E 's/<def>//g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" \) -type f -print0 | xargs -0 sed -i '' -E 's/([^ ]+)<kill>/killed \1/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" \) -type f -print0 | xargs -0 sed -i '' -E 's/([^ ]+)<imp-use,kill>/implicit killed \1/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" \) -type f -print0 | xargs -0 sed -i '' -E 's/([^ ]+)<dead>/dead \1/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" \) -type f -print0 | xargs -0 sed -i '' -E 's/([^ ]+)<def[ ]*,[ ]*dead>/dead \1/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" \) -type f -print0 | xargs -0 sed -i '' -E 's/([^ ]+)<imp-def[ ]*,[ ]*dead>/implicit-def dead \1/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" \) -type f -print0 | xargs -0 sed -i '' -E 's/([^ ]+)<imp-def>/implicit-def \1/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" \) -type f -print0 | xargs -0 sed -i '' -E 's/([^ ]+)<imp-use>/implicit \1/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" \) -type f -print0 | xargs -0 sed -i '' -E 's/([^ ]+)<internal>/internal \1/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" -o -name "*.s" \) -type f -print0 | xargs -0 sed -i '' -E 's/([^ ]+)<undef>/undef \1/g' llvm-svn: 320022
2017-12-07 18:40:31 +08:00
; CHECK-LABEL: SU({{.*}}): %{{.*}} = LDW_RI{{.*}}, 12,
[lanai] Add areMemAccessesTriviallyDisjoint, getMemOpBaseRegImmOfs and getMemOpBaseRegImmOfsWidth. Summary: Add getMemOpBaseRegImmOfsWidth to enable determining independence during MiSched. Reviewers: eliben, majnemer Subscribers: mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D18903 llvm-svn: 266338
2016-04-15 00:47:42 +08:00
; CHECK: # preds left : 1
; CHECK: # succs left : 4
; CHECK-LABEL: SU({{.*}}): STH_RI{{.*}}, 10,
; CHECK: # preds left : 2
; CHECK: # succs left : 0
; CHECK-LABEL: SU({{.*}}): STH_RI{{.*}}, 12,
; CHECK: # preds left : 3
; CHECK: # succs left : 0
; CHECK-LABEL: SU({{.*}}): STB_RI{{.*}}, 14,
; CHECK: # preds left : 3
; CHECK: # succs left : 0
; CHECK-LABEL: SU({{.*}}): STB_RI{{.*}}, 15,
; CHECK: # preds left : 3
; CHECK: # succs left : 0
; CHECK-LABEL: SU({{.*}}): STB_RI{{.*}}, 16,
; CHECK: # preds left : 2
Add a REQUIRES: assert on a Lanai test that uses a -debug-only flag llvm-svn: 277204
2016-07-30 03:35:22 +08:00
; CHECK: # succs left : 0