forked from OSchip/llvm-project
55 lines
1.6 KiB
Plaintext
55 lines
1.6 KiB
Plaintext
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck %s
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# CHECK-LABEL: all_sgpr_used
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# CHECK: V_CMP_LT_U32_e64
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--- |
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define amdgpu_kernel void @all_sgpr_used() #0 {
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ret void
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}
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attributes #0 = { "amdgpu-num-sgpr"="8" "frame-pointer"="all"}
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...
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---
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name: all_sgpr_used
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tracksRegLiveness: true
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liveins:
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- { reg: '$vgpr0' }
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- { reg: '$vgpr1' }
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- { reg: '$vgpr2' }
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- { reg: '$sgpr4_sgpr5' }
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- { reg: '$sgpr6_sgpr7' }
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- { reg: '$sgpr8' }
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- { reg: '$sgpr9' }
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machineFunctionInfo:
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explicitKernArgSize: 84
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maxKernArgAlign: 8
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ldsSize: 20496
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isEntryFunction: true
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waveLimiter: true
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scratchRSrcReg: '$sgpr96_sgpr97_sgpr98_sgpr99'
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scratchWaveOffsetReg: '$sgpr101'
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frameOffsetReg: '$sgpr101'
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stackPtrOffsetReg: '$sgpr32'
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argumentInfo:
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privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' }
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dispatchPtr: { reg: '$sgpr4_sgpr5' }
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kernargSegmentPtr: { reg: '$sgpr6_sgpr7' }
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workGroupIDX: { reg: '$sgpr8' }
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workGroupIDY: { reg: '$sgpr9' }
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privateSegmentWaveByteOffset: { reg: '$sgpr10' }
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workItemIDX: { reg: '$vgpr0' }
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workItemIDY: { reg: '$vgpr1' }
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workItemIDZ: { reg: '$vgpr2' }
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body: |
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bb.0:
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liveins: $sgpr8, $sgpr9, $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7
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$sgpr0 = S_MOV_B32 0
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$sgpr1 = S_MOV_B32 0
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$sgpr2 = S_MOV_B32 0
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$sgpr3 = S_MOV_B32 0
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$sgpr4 = S_MOV_B32 0
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$sgpr5 = S_MOV_B32 0
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$sgpr6 = S_MOV_B32 0
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$sgpr7 = S_MOV_B32 0
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$vcc = V_CMP_LT_U32_e64 $sgpr8, $vgpr1, implicit $exec
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...
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