2009-03-01 10:03:43 +08:00
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; RUN: llvm-as < %s | llc -march=x86 -stats |& \
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Teach 2addr pass to be do more commuting. If both uses of a two-address instruction are killed, but the first operand has a use before and after the def, commute if the second operand does not suffer from the same issue.
%reg1028<def> = EXTRACT_SUBREG %reg1027<kill>, 1
%reg1029<def> = MOV8rr %reg1028
%reg1029<def> = SHR8ri %reg1029, 7, %EFLAGS<imp-def,dead>
insert => %reg1030<def> = MOV8rr %reg1028
%reg1030<def> = ADD8rr %reg1028<kill>, %reg1029<kill>, %EFLAGS<imp-def,dead>
In this case, it might not be possible to coalesce the second MOV8rr
instruction if the first one is coalesced. So it would be profitable to
commute it:
%reg1028<def> = EXTRACT_SUBREG %reg1027<kill>, 1
%reg1029<def> = MOV8rr %reg1028
%reg1029<def> = SHR8ri %reg1029, 7, %EFLAGS<imp-def,dead>
insert => %reg1030<def> = MOV8rr %reg1029
%reg1030<def> = ADD8rr %reg1029<kill>, %reg1028<kill>, %EFLAGS<imp-def,dead>
llvm-svn: 62954
2009-01-25 11:53:59 +08:00
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; RUN: grep {twoaddrinstr} | grep {Number of instructions aggressively commuted}
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; rdar://6523745
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@"\01LC" = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1]
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define i32 @main() nounwind {
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bb1.thread:
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br label %bb1
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bb1: ; preds = %bb1, %bb1.thread
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%i.0.reg2mem.0 = phi i32 [ 0, %bb1.thread ], [ %indvar.next, %bb1 ] ; <i32> [#uses=2]
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%0 = trunc i32 %i.0.reg2mem.0 to i8 ; <i8> [#uses=1]
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%1 = sdiv i8 %0, 2 ; <i8> [#uses=1]
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%2 = sext i8 %1 to i32 ; <i32> [#uses=1]
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%3 = tail call i32 (i8*, ...)* @printf(i8* getelementptr ([4 x i8]* @"\01LC", i32 0, i32 0), i32 %2) nounwind ; <i32> [#uses=0]
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%indvar.next = add i32 %i.0.reg2mem.0, 1 ; <i32> [#uses=2]
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%exitcond = icmp eq i32 %indvar.next, 258 ; <i1> [#uses=1]
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br i1 %exitcond, label %bb2, label %bb1
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bb2: ; preds = %bb1
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ret i32 0
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}
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declare i32 @printf(i8*, ...) nounwind
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