2019-06-08 14:19:15 +08:00
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//==---- SystemZPostRewrite.cpp - Select pseudos after RegAlloc ---*- C++ -*-=//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains a pass that is run immediately after VirtRegRewriter
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// but before MachineCopyPropagation. The purpose is to lower pseudos to
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// target instructions before any later pass might substitute a register for
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// another.
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//
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//===----------------------------------------------------------------------===//
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#include "SystemZ.h"
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#include "SystemZInstrInfo.h"
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#include "SystemZSubtarget.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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using namespace llvm;
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#define SYSTEMZ_POSTREWRITE_NAME "SystemZ Post Rewrite pass"
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#define DEBUG_TYPE "systemz-postrewrite"
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STATISTIC(MemFoldCopies, "Number of copies inserted before folded mem ops.");
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namespace llvm {
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void initializeSystemZPostRewritePass(PassRegistry&);
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}
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namespace {
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class SystemZPostRewrite : public MachineFunctionPass {
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public:
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static char ID;
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SystemZPostRewrite() : MachineFunctionPass(ID) {
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initializeSystemZPostRewritePass(*PassRegistry::getPassRegistry());
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}
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const SystemZInstrInfo *TII;
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bool runOnMachineFunction(MachineFunction &Fn) override;
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StringRef getPassName() const override { return SYSTEMZ_POSTREWRITE_NAME; }
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.setPreservesAll();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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private:
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bool selectMI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
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MachineBasicBlock::iterator &NextMBBI);
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bool selectMBB(MachineBasicBlock &MBB);
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};
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char SystemZPostRewrite::ID = 0;
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} // end anonymous namespace
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INITIALIZE_PASS(SystemZPostRewrite, "systemz-post-rewrite",
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SYSTEMZ_POSTREWRITE_NAME, false, false)
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/// Returns an instance of the Post Rewrite pass.
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FunctionPass *llvm::createSystemZPostRewritePass(SystemZTargetMachine &TM) {
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return new SystemZPostRewrite();
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}
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/// If MBBI references a pseudo instruction that should be selected here,
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/// do it and return true. Otherwise return false.
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bool SystemZPostRewrite::selectMI(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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MachineBasicBlock::iterator &NextMBBI) {
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MachineInstr &MI = *MBBI;
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unsigned Opcode = MI.getOpcode();
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// Note: If this could be done during regalloc in foldMemoryOperandImpl()
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// while also updating the LiveIntervals, there would be no need for the
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// MemFoldPseudo to begin with.
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int TargetMemOpcode = SystemZ::getTargetMemOpcode(Opcode);
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if (TargetMemOpcode != -1) {
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MI.setDesc(TII->get(TargetMemOpcode));
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MI.tieOperands(0, 1);
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Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
Summary:
This clang-tidy check is looking for unsigned integer variables whose initializer
starts with an implicit cast from llvm::Register and changes the type of the
variable to llvm::Register (dropping the llvm:: where possible).
Partial reverts in:
X86FrameLowering.cpp - Some functions return unsigned and arguably should be MCRegister
X86FixupLEAs.cpp - Some functions return unsigned and arguably should be MCRegister
X86FrameLowering.cpp - Some functions return unsigned and arguably should be MCRegister
HexagonBitSimplify.cpp - Function takes BitTracker::RegisterRef which appears to be unsigned&
MachineVerifier.cpp - Ambiguous operator==() given MCRegister and const Register
PPCFastISel.cpp - No Register::operator-=()
PeepholeOptimizer.cpp - TargetInstrInfo::optimizeLoadInstr() takes an unsigned&
MachineTraceMetrics.cpp - MachineTraceMetrics lacks a suitable constructor
Manual fixups in:
ARMFastISel.cpp - ARMEmitLoad() now takes a Register& instead of unsigned&
HexagonSplitDouble.cpp - Ternary operator was ambiguous between unsigned/Register
HexagonConstExtenders.cpp - Has a local class named Register, used llvm::Register instead of Register.
PPCFastISel.cpp - PPCEmitLoad() now takes a Register& instead of unsigned&
Depends on D65919
Reviewers: arsenm, bogner, craig.topper, RKSimon
Reviewed By: arsenm
Subscribers: RKSimon, craig.topper, lenary, aemerson, wuzish, jholewinski, MatzeB, qcolombet, dschuff, jyknight, dylanmckay, sdardis, nemanjai, jvesely, wdng, nhaehnle, sbc100, jgravelle-google, kristof.beyls, hiraditya, aheejin, kbarton, fedor.sergeev, javed.absar, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, tpr, PkmX, jocewei, jsji, Petar.Avramovic, asbirlea, Jim, s.egerton, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D65962
llvm-svn: 369041
2019-08-16 03:22:08 +08:00
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Register DstReg = MI.getOperand(0).getReg();
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2019-06-08 14:19:15 +08:00
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MachineOperand &SrcMO = MI.getOperand(1);
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if (DstReg != SrcMO.getReg()) {
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BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(SystemZ::COPY), DstReg)
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.addReg(SrcMO.getReg());
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SrcMO.setReg(DstReg);
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MemFoldCopies++;
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}
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return true;
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}
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return false;
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}
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/// Iterate over the instructions in basic block MBB and select any
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/// pseudo instructions. Return true if anything was modified.
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bool SystemZPostRewrite::selectMBB(MachineBasicBlock &MBB) {
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bool Modified = false;
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MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end();
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while (MBBI != E) {
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MachineBasicBlock::iterator NMBBI = std::next(MBBI);
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Modified |= selectMI(MBB, MBBI, NMBBI);
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MBBI = NMBBI;
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}
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return Modified;
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}
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bool SystemZPostRewrite::runOnMachineFunction(MachineFunction &MF) {
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TII = static_cast<const SystemZInstrInfo *>(MF.getSubtarget().getInstrInfo());
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bool Modified = false;
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for (auto &MBB : MF)
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Modified |= selectMBB(MBB);
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return Modified;
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}
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