forked from OSchip/llvm-project
72 lines
1.8 KiB
LLVM
72 lines
1.8 KiB
LLVM
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; Test 64-bit floating-point addition.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; Check register addition.
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define double @f1(double %f1, double %f2) {
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; CHECK: f1:
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; CHECK: adbr %f0, %f2
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; CHECK: br %r14
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%res = fadd double %f1, %f2
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ret double %res
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}
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; Check the low end of the ADB range.
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define double @f2(double %f1, double *%ptr) {
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; CHECK: f2:
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; CHECK: adb %f0, 0(%r2)
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; CHECK: br %r14
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%f2 = load double *%ptr
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%res = fadd double %f1, %f2
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ret double %res
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}
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; Check the high end of the aligned ADB range.
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define double @f3(double %f1, double *%base) {
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; CHECK: f3:
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; CHECK: adb %f0, 4088(%r2)
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; CHECK: br %r14
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%ptr = getelementptr double *%base, i64 511
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%f2 = load double *%ptr
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%res = fadd double %f1, %f2
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ret double %res
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}
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; Check the next doubleword up, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define double @f4(double %f1, double *%base) {
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; CHECK: f4:
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; CHECK: aghi %r2, 4096
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; CHECK: adb %f0, 0(%r2)
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; CHECK: br %r14
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%ptr = getelementptr double *%base, i64 512
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%f2 = load double *%ptr
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%res = fadd double %f1, %f2
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ret double %res
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}
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; Check negative displacements, which also need separate address logic.
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define double @f5(double %f1, double *%base) {
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; CHECK: f5:
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; CHECK: aghi %r2, -8
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; CHECK: adb %f0, 0(%r2)
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; CHECK: br %r14
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%ptr = getelementptr double *%base, i64 -1
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%f2 = load double *%ptr
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%res = fadd double %f1, %f2
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ret double %res
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}
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; Check that ADB allows indices.
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define double @f6(double %f1, double *%base, i64 %index) {
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; CHECK: f6:
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; CHECK: sllg %r1, %r3, 3
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; CHECK: adb %f0, 800(%r1,%r2)
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; CHECK: br %r14
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%ptr1 = getelementptr double *%base, i64 %index
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%ptr2 = getelementptr double *%ptr1, i64 100
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%f2 = load double *%ptr2
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%res = fadd double %f1, %f2
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ret double %res
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}
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