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llvm-project/llvm/test/CodeGen/Mips/compactbranches/compact-branches-64.ll

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[mips] Recommit: "N64 static relocation model support" This patch makes one change to GOT handling and two changes to N64's relocation model handling. Furthermore, the jumptable encodings have been corrected for static N64. Big GOT handling is now done via a new SDNode MipsGotHi - this node is unconditionally lowered to an lui instruction. The first change to N64's relocation handling is the lifting of the restriction that N64 always uses PIC. Now it is possible to target static environments. The second change adds support for 64 bit symbols and enables them by default. Previously N64 had patterns for sym32 mode only. In this mode all symbols are assumed to have 32 bit addresses. sym32 mode support is selectable with attribute 'sym32'. A follow on patch for clang will add the necessary frontend parameter. This partially resolves PR/23485. Thanks to Brooks Davis for reporting the issue! This version corrects a "Conditional jump or move depends on uninitialised value(s)" error detected by valgrind present in the original commit. Reviewers: dsanders, seanbruno, zoran.jovanovic, vkalintiris Differential Revision: https://reviews.llvm.org/D23652 llvm-svn: 293279
2017-01-27 19:36:52 +08:00
; RUN: llc -relocation-model=pic -march=mipsel -mcpu=mips64r6 \
; RUN: -disable-mips-delay-filler -target-abi=n64 < %s | FileCheck %s
[mips] MIPS64R6 compact branch support MIPS64R6 compact branch support. As the MIPS LLVM backend uses distinct MachineInstrs for certain 32 and 64 bit instructions (e.g. BEQ & BEQ64) that map to the same instruction, extend compact branch support for the corresponding 64bit branches. Reviewers: dsanders Differential Revision: https://reviews.llvm.org/D20164 llvm-svn: 276739
2016-07-26 18:25:07 +08:00
; Function Attrs: nounwind
define void @l() {
entry:
; CHECK-LABEL: l:
; CHECK: jalrc $25
%call = tail call i64 @k()
; CHECK: jalrc $25
%call1 = tail call i64 @j()
%cmp = icmp eq i64 %call, %call1
; CHECK: bnec
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry:
; CHECK: jalrc $25
tail call void @f(i64 signext -2)
br label %if.end
if.end: ; preds = %if.then, %entry
; CHECK: jrc $ra
ret void
}
declare i64 @k()
declare i64 @j()
declare void @f(i64 signext)
; Function Attrs: define void @l2() {
define void @l2() {
entry:
; CHECK-LABEL: l2:
; CHECK: jalrc $25
%call = tail call i64 @k()
; CHECK: jalrc $25
%call1 = tail call i64 @i()
%cmp = icmp eq i64 %call, %call1
; CHECK: beqc
br i1 %cmp, label %if.end, label %if.then
if.then: ; preds = %entry:
; CHECK: jalrc $25
tail call void @f(i64 signext -1)
br label %if.end
if.end: ; preds = %entry, %if.then
; CHECK: jrc $ra
ret void
}
declare i64 @i()
; Function Attrs: nounwind
define void @l3() {
entry:
; CHECK-LABEL: l3:
; CHECK: jalrc $25
%call = tail call i64 @k()
%cmp = icmp slt i64 %call, 0
; CHECK: bgez
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry:
; CHECK: jalrc $25
tail call void @f(i64 signext 0)
br label %if.end
if.end: ; preds = %if.then, %entry
; CHECK: jrc $ra
ret void
}
; Function Attrs: nounwind
define void @l4() {
entry:
; CHECK-LABEL: l4:
; CHECK: jalrc $25
%call = tail call i64 @k()
%cmp = icmp slt i64 %call, 1
; CHECK: bgtzc
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry:
tail call void @f(i64 signext 1)
br label %if.end
if.end: ; preds = %if.then, %entry
; CHECK: jrc $ra
ret void
}
; Function Attrs: nounwind
define void @l5() {
entry:
; CHECK-LABEL: l5:
; CHECK: jalrc $25
%call = tail call i64 @k()
%cmp = icmp sgt i64 %call, 0
; CHECK: blezc
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry:
; CHECK: jalrc $25
tail call void @f(i64 signext 2)
br label %if.end
if.end: ; preds = %if.then, %entry
; CHECK: jrc $ra
ret void
}
; Function Attrs: nounwind
define void @l6() {
entry:
; CHECK-LABEL: l6:
; CHECK: jalrc $25
%call = tail call i64 @k()
%cmp = icmp sgt i64 %call, -1
; CHECK: bltzc
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry:
; CHECK: jalrc $25
tail call void @f(i64 signext 3)
br label %if.end
if.end: ; preds = %if.then, %entry
; CHECK: jrc $ra
ret void
}
; Function Attrs: nounwind
define void @l7() {
entry:
; CHECK-LABEL: l7:
; CHECK: jalrc $25
%call = tail call i64 @k()
%cmp = icmp eq i64 %call, 0
; CHECK: bnezc
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry:
; CHECK: jalrc $25
tail call void @f(i64 signext 4)
br label %if.end
if.end: ; preds = %if.then, %entry
; CHECK: jrc $ra
ret void
}
; Function Attrs: nounwind
define void @l8() {
entry:
; CHECK-LABEL: l8:
; CHECK: jalrc $25
%call = tail call i64 @k()
%cmp = icmp eq i64 %call, 0
; CHECK: beqzc
br i1 %cmp, label %if.end, label %if.then
if.then: ; preds = %entry:
; CHECK: jalrc $25
tail call void @f(i64 signext 5)
br label %if.end
if.end: ; preds = %entry, %if.then
; CHECK: jrc $ra
ret void
}
define i64 @l9(i8* ()* %i) {
entry:
; CHECK-LABEL: l9:
%i.addr = alloca i8* ()*, align 4
store i8* ()* %i, i8* ()** %i.addr, align 4
; CHECK: jalrc $25
%call = call i64 @k()
%cmp = icmp ne i64 %call, 0
; CHECK: beqzc
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
%0 = load i8* ()*, i8* ()** %i.addr, align 4
; CHECK: jalrc $25
%call1 = call i8* %0()
br label %if.end
if.end: ; preds = %if.then, %entry
; CHECK: jrc $ra
ret i64 -1
}