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llvm-project/llvm/test/MC/VE/CVTDW.s

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[VE] Support convert instructions in MC layer Summary: Add CVTSQ/CVTDQ/CVTQD/CVTQS instructions. Add regression tests for them and other convert instructions of asmparser, mccodeemitter, and disassembler. In order to add those instructions, support RD operands in asmparser, mccodeemitter, and disassembler. Differential Revision: https://reviews.llvm.org/D81536
2020-06-10 18:22:19 +08:00
# RUN: llvm-mc -triple=ve --show-encoding < %s \
# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
# RUN: | FileCheck %s --check-prefixes=CHECK-INST
# CHECK-INST: cvt.d.w %s11, %s12
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x8c,0x0b,0x5e]
cvt.d.w %s11, %s12
# CHECK-INST: cvt.d.w %s11, 63
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x3f,0x0b,0x5e]
cvt.d.w %s11, 63
# CHECK-INST: cvt.d.w %s11, -64
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x40,0x0b,0x5e]
cvt.d.w %s11, -64
# CHECK-INST: cvt.d.w %s11, -1
# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x7f,0x0b,0x5e]
cvt.d.w %s11, -1