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llvm-project/llvm/test/CodeGen/PowerPC/set0-v8i16.ll

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Adding -verify-machineinstrs option to PowerPC tests Currently we have a number of tests that fail with -verify-machineinstrs. To detect this cases earlier we add the option to the testcases with the exception of tests that will currently fail with this option. PR 27456 keeps track of this failures. No code review, as discussed with Hal Finkel. llvm-svn: 277624
2016-08-04 02:17:35 +08:00
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s
PPC: Add some missing V_SET0 patterns We had patterns to match v4i32 immAllZerosV -> V_SET0, but not patterns for v8i16 (which occurs in the test case) or v16i8. The same was true for V_SETALLONES (so I added the associated patterns for those as well). Another bug found by llvm-stress. llvm-svn: 186108
2013-07-12 01:43:32 +08:00
target triple = "powerpc64-unknown-linux-gnu"
define void @autogen_SD367951() {
BB:
%Shuff = shufflevector <16 x i16> zeroinitializer, <16 x i16> zeroinitializer, <16 x i32> <i32 26, i32 28, i32 30, i32 undef, i32 2, i32 4, i32 undef, i32 undef, i32 10, i32 undef, i32 14, i32 16, i32 undef, i32 20, i32 undef, i32 24>
%Shuff7 = shufflevector <16 x i16> zeroinitializer, <16 x i16> %Shuff, <16 x i32> <i32 20, i32 undef, i32 24, i32 26, i32 28, i32 undef, i32 0, i32 undef, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18>
%Cmp11 = icmp ugt <16 x i16> %Shuff7, zeroinitializer
%E27 = extractelement <16 x i1> %Cmp11, i32 5
br label %CF76
CF76: ; preds = %CF80, %CF76, %BB
br i1 undef, label %CF76, label %CF80
CF80: ; preds = %CF76
%Sl37 = select i1 %E27, <16 x i16> undef, <16 x i16> %Shuff
br label %CF76
}