llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/select-imm.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s

--- |
  target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"

  define void @imm_s32_gpr() { ret void }
  define void @imm_s64_gpr() { ret void }

...

---
# Check that we select a 32-bit immediate into a MOVi32imm.
name:            imm_s32_gpr
legalized:       true
regBankSelected: true

registers:
  - { id: 0, class: gpr }

body:             |
  bb.0:
    liveins: %w0, %w1

    ; CHECK-LABEL: name: imm_s32_gpr
    ; CHECK: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm -1234
    ; CHECK: %w0 = COPY [[MOVi32imm]]
    %0(s32) = G_CONSTANT i32 -1234
    %w0 = COPY %0(s32)
...

---
# Check that we select a 64-bit immediate into a MOVi64imm.
name:            imm_s64_gpr
legalized:       true
regBankSelected: true

registers:
  - { id: 0, class: gpr }

body:             |
  bb.0:
    liveins: %w0, %w1

    ; CHECK-LABEL: name: imm_s64_gpr
    ; CHECK: [[MOVi64imm:%[0-9]+]]:gpr64 = MOVi64imm 1234
    ; CHECK: %x0 = COPY [[MOVi64imm]]
    %0(s64) = G_CONSTANT i64 1234
    %x0 = COPY %0(s64)
...