forked from OSchip/llvm-project
16 lines
503 B
LLVM
16 lines
503 B
LLVM
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; RUN: llc -march=hexagon < %s | FileCheck %s
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; This test validates the generation of v66 only instruction M2_mnaci
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; CHECK: r{{[0-9]+}} -= mpyi(r{{[0-9]+}},r{{[0-9]+}})
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target triple = "hexagon-unknown--elf"
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; Function Attrs: norecurse nounwind readnone
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define i32 @_Z4testiii(i32 %a, i32 %b, i32 %c) #0 {
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entry:
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%mul = mul nsw i32 %c, %b
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%sub = sub nsw i32 %a, %mul
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ret i32 %sub
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}
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attributes #0 = { norecurse nounwind readnone "target-cpu"="hexagonv66" "target-features"="-hvx,-long-calls" }
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