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llvm-project/llvm/test/CodeGen/Generic/empty-phi.ll

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CodeGen: do not attempt to invalidate virtual registers for zero-sized phis. llvm-svn: 224615
2014-12-20 04:50:07 +08:00
; RUN: llc < %s
define void @f() {
entry:
br label %bb1
bb1:
%0 = phi [0 x { i8*, i64, i64 }] [ %load, %bb2 ], [ undef, %entry ]
store [0 x { i8*, i64, i64 }] %0, [0 x { i8*, i64, i64 }]* undef, align 8
%1 = icmp eq i64 undef, 0
br i1 %1, label %bb2, label %bb3
bb2:
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%load = load [0 x { i8*, i64, i64 }], [0 x { i8*, i64, i64 }]* undef, align 8
CodeGen: do not attempt to invalidate virtual registers for zero-sized phis. llvm-svn: 224615
2014-12-20 04:50:07 +08:00
br label %bb1
bb3:
ret void
}