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llvm-project/clang/test/Driver/target-id.cl

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[HIP] Support target id by --offload-arch This patch introduces support of target id by -offload-arch. Differential Revision: https://reviews.llvm.org/D60620
2020-05-05 11:22:06 +08:00
// REQUIRES: clang-driver
// REQUIRES: x86-registered-target
// REQUIRES: amdgpu-registered-target
// RUN: %clang -### -target amdgcn-amd-amdhsa \
[clang][AMDGPU] rename sram-ecc as sramecc As backend renamed sram-ecc to sramecc, this patch makes corresponding change in clang. Differential Revision: https://reviews.llvm.org/D86217
2020-12-08 06:31:28 +08:00
// RUN: -mcpu=gfx908:xnack+:sramecc- \
[HIP] Support target id by --offload-arch This patch introduces support of target id by -offload-arch. Differential Revision: https://reviews.llvm.org/D60620
2020-05-05 11:22:06 +08:00
// RUN: -nostdlib %s 2>&1 | FileCheck %s
// RUN: %clang -### -target amdgcn-amd-amdhsa \
[clang][AMDGPU] rename sram-ecc as sramecc As backend renamed sram-ecc to sramecc, this patch makes corresponding change in clang. Differential Revision: https://reviews.llvm.org/D86217
2020-12-08 06:31:28 +08:00
// RUN: -mcpu=gfx908:xnack+:sramecc- \
[HIP] Support target id by --offload-arch This patch introduces support of target id by -offload-arch. Differential Revision: https://reviews.llvm.org/D60620
2020-05-05 11:22:06 +08:00
// RUN: -nostdlib -x ir %s 2>&1 | FileCheck %s
// RUN: %clang -### -target amdgcn-amd-amdhsa \
[clang][AMDGPU] rename sram-ecc as sramecc As backend renamed sram-ecc to sramecc, this patch makes corresponding change in clang. Differential Revision: https://reviews.llvm.org/D86217
2020-12-08 06:31:28 +08:00
// RUN: -mcpu=gfx908:xnack+:sramecc- \
[HIP] Support target id by --offload-arch This patch introduces support of target id by -offload-arch. Differential Revision: https://reviews.llvm.org/D60620
2020-05-05 11:22:06 +08:00
// RUN: -nostdlib -x assembler %s 2>&1 | FileCheck %s
// RUN: %clang -### -target amdgcn-amd-amdpal \
[clang][AMDGPU] rename sram-ecc as sramecc As backend renamed sram-ecc to sramecc, this patch makes corresponding change in clang. Differential Revision: https://reviews.llvm.org/D86217
2020-12-08 06:31:28 +08:00
// RUN: -mcpu=gfx908:xnack+:sramecc- \
[HIP] Support target id by --offload-arch This patch introduces support of target id by -offload-arch. Differential Revision: https://reviews.llvm.org/D60620
2020-05-05 11:22:06 +08:00
// RUN: -nostdlib %s 2>&1 | FileCheck %s
// RUN: %clang -### -target amdgcn--mesa3d \
[clang][AMDGPU] rename sram-ecc as sramecc As backend renamed sram-ecc to sramecc, this patch makes corresponding change in clang. Differential Revision: https://reviews.llvm.org/D86217
2020-12-08 06:31:28 +08:00
// RUN: -mcpu=gfx908:xnack+:sramecc- \
[HIP] Support target id by --offload-arch This patch introduces support of target id by -offload-arch. Differential Revision: https://reviews.llvm.org/D60620
2020-05-05 11:22:06 +08:00
// RUN: -nostdlib %s 2>&1 | FileCheck %s
// RUN: %clang -### -target amdgcn-amd-amdhsa \
// RUN: -nostdlib %s 2>&1 | FileCheck -check-prefix=NONE %s
// CHECK: "-target-cpu" "gfx908"
[clang][AMDGPU] rename sram-ecc as sramecc As backend renamed sram-ecc to sramecc, this patch makes corresponding change in clang. Differential Revision: https://reviews.llvm.org/D86217
2020-12-08 06:31:28 +08:00
// CHECK-SAME: "-target-feature" "-sramecc"
[HIP] Support target id by --offload-arch This patch introduces support of target id by -offload-arch. Differential Revision: https://reviews.llvm.org/D60620
2020-05-05 11:22:06 +08:00
// CHECK-SAME: "-target-feature" "+xnack"
// NONE-NOT: "-target-cpu"
// NONE-NOT: "-target-feature"