2013-08-13 05:02:02 +08:00
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//===-- SelectionDAGBuilder.h - Selection-DAG building --------*- C++ -*---===//
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2008-09-04 00:12:24 +08:00
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This implements routines for translating from LLVM IR into SelectionDAG IR.
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//
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//===----------------------------------------------------------------------===//
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2014-08-14 00:26:38 +08:00
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#ifndef LLVM_LIB_CODEGEN_SELECTIONDAG_SELECTIONDAGBUILDER_H
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#define LLVM_LIB_CODEGEN_SELECTIONDAG_SELECTIONDAGBUILDER_H
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2008-09-04 00:12:24 +08:00
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2015-01-14 19:23:27 +08:00
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#include "StatepointLowering.h"
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2008-09-04 00:12:24 +08:00
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#include "llvm/ADT/APInt.h"
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#include "llvm/ADT/DenseMap.h"
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2015-05-06 07:06:54 +08:00
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#include "llvm/CodeGen/Analysis.h"
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2012-12-04 15:12:27 +08:00
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#include "llvm/CodeGen/SelectionDAG.h"
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2008-09-04 00:12:24 +08:00
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#include "llvm/CodeGen/SelectionDAGNodes.h"
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2014-03-04 19:01:28 +08:00
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#include "llvm/IR/CallSite.h"
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2015-02-20 23:28:35 +08:00
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#include "llvm/IR/Statepoint.h"
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2013-01-02 19:36:10 +08:00
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#include "llvm/IR/Constants.h"
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2009-07-12 04:10:48 +08:00
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#include "llvm/Support/ErrorHandling.h"
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2014-10-17 05:26:35 +08:00
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#include "llvm/Target/TargetLowering.h"
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2008-09-04 00:12:24 +08:00
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#include <vector>
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namespace llvm {
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2013-11-15 09:34:59 +08:00
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class AddrSpaceCastInst;
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2008-09-04 00:12:24 +08:00
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class AliasAnalysis;
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class AllocaInst;
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class BasicBlock;
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class BitCastInst;
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class BranchInst;
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class CallInst;
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2010-08-27 07:35:15 +08:00
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class DbgValueInst;
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2008-09-04 00:12:24 +08:00
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class ExtractElementInst;
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class ExtractValueInst;
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class FCmpInst;
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class FPExtInst;
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class FPToSIInst;
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class FPToUIInst;
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class FPTruncInst;
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class Function;
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2009-11-24 01:16:22 +08:00
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class FunctionLoweringInfo;
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2008-09-04 00:12:24 +08:00
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class GetElementPtrInst;
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class GCFunctionInfo;
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class ICmpInst;
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class IntToPtrInst;
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2009-10-28 08:19:10 +08:00
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class IndirectBrInst;
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2008-09-04 00:12:24 +08:00
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class InvokeInst;
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class InsertElementInst;
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class InsertValueInst;
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class Instruction;
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class LoadInst;
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class MachineBasicBlock;
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class MachineInstr;
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class MachineRegisterInfo;
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2010-04-29 07:08:54 +08:00
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class MDNode;
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2014-03-12 16:00:24 +08:00
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class MVT;
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2008-09-04 00:12:24 +08:00
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class PHINode;
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class PtrToIntInst;
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class ReturnInst;
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2010-07-16 08:02:08 +08:00
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class SDDbgValue;
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2008-09-04 00:12:24 +08:00
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class SExtInst;
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class SelectInst;
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class ShuffleVectorInst;
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class SIToFPInst;
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class StoreInst;
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class SwitchInst;
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2012-10-09 00:38:25 +08:00
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class DataLayout;
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2011-12-09 06:15:21 +08:00
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class TargetLibraryInfo;
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2008-09-04 00:12:24 +08:00
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class TargetLowering;
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class TruncInst;
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class UIToFPInst;
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class UnreachableInst;
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class VAArgInst;
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class ZExtInst;
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//===----------------------------------------------------------------------===//
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2009-11-24 02:04:58 +08:00
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/// SelectionDAGBuilder - This is the common target-independent lowering
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2008-09-04 00:12:24 +08:00
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/// implementation that is parameterized by a TargetLowering object.
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///
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2013-09-12 02:05:11 +08:00
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class SelectionDAGBuilder {
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2013-05-25 10:20:36 +08:00
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/// CurInst - The current instruction being visited
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const Instruction *CurInst;
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2009-01-31 10:22:37 +08:00
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2008-09-04 00:12:24 +08:00
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DenseMap<const Value*, SDValue> NodeMap;
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2013-11-01 01:18:07 +08:00
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2010-06-02 03:59:01 +08:00
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/// UnusedArgNodeMap - Maps argument value for unused arguments. This is used
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/// to preserve debug information for incoming arguments.
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DenseMap<const Value*, SDValue> UnusedArgNodeMap;
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2008-09-04 00:12:24 +08:00
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2010-07-16 08:02:08 +08:00
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/// DanglingDebugInfo - Helper type for DanglingDebugInfoMap.
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class DanglingDebugInfo {
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2010-08-27 07:35:15 +08:00
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const DbgValueInst* DI;
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2010-07-16 08:02:08 +08:00
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DebugLoc dl;
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unsigned SDNodeOrder;
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public:
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2014-04-16 12:21:27 +08:00
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DanglingDebugInfo() : DI(nullptr), dl(DebugLoc()), SDNodeOrder(0) { }
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2010-08-27 07:35:15 +08:00
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DanglingDebugInfo(const DbgValueInst *di, DebugLoc DL, unsigned SDNO) :
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2010-07-16 08:02:08 +08:00
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DI(di), dl(DL), SDNodeOrder(SDNO) { }
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2010-08-27 07:35:15 +08:00
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const DbgValueInst* getDI() { return DI; }
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2010-07-16 08:02:08 +08:00
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DebugLoc getdl() { return dl; }
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unsigned getSDNodeOrder() { return SDNodeOrder; }
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};
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/// DanglingDebugInfoMap - Keeps track of dbg_values for which we have not
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/// yet seen the referent. We defer handling these until we do see it.
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DenseMap<const Value*, DanglingDebugInfo> DanglingDebugInfoMap;
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2009-12-24 08:37:38 +08:00
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public:
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2008-09-04 00:12:24 +08:00
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/// PendingLoads - Loads are not emitted to the program immediately. We bunch
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/// them up and then emit token factor nodes when possible. This allows us to
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/// get simple disambiguation between loads without worrying about alias
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/// analysis.
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SmallVector<SDValue, 8> PendingLoads;
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[Statepoints 3/4] Statepoint infrastructure for garbage collection: SelectionDAGBuilder
This is the third patch in a small series. It contains the CodeGen support for lowering the gc.statepoint intrinsic sequences (223078) to the STATEPOINT pseudo machine instruction (223085). The change also includes the set of helper routines and classes for working with gc.statepoints, gc.relocates, and gc.results since the lowering code uses them.
With this change, gc.statepoints should be functionally complete. The documentation will follow in the fourth change, and there will likely be some cleanup changes, but interested parties can start experimenting now.
I'm not particularly happy with the amount of code or complexity involved with the lowering step, but at least it's fairly well isolated. The statepoint lowering code is split into it's own files and anyone not working on the statepoint support itself should be able to ignore it.
During the lowering process, we currently spill aggressively to stack. This is not entirely ideal (and we have plans to do better), but it's functional, relatively straight forward, and matches closely the implementations of the patchpoint intrinsics. Most of the complexity comes from trying to keep relocated copies of values in the same stack slots across statepoints. Doing so avoids the insertion of pointless load and store instructions to reshuffle the stack. The current implementation isn't as effective as I'd like, but it is functional and 'good enough' for many common use cases.
In the long term, I'd like to figure out how to integrate the statepoint lowering with the register allocator. In principal, we shouldn't need to eagerly spill at all. The register allocator should do any spilling required and the statepoint should simply record that fact. Depending on how challenging that turns out to be, we may invest in a smarter global stack slot assignment mechanism as a stop gap measure.
Reviewed by: atrick, ributzka
llvm-svn: 223137
2014-12-03 02:50:36 +08:00
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/// State used while lowering a statepoint sequence (gc_statepoint,
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/// gc_relocate, and gc_result). See StatepointLowering.hpp/cpp for details.
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StatepointLoweringState StatepointLowering;
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2009-12-24 08:37:38 +08:00
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private:
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2008-09-04 00:12:24 +08:00
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/// PendingExports - CopyToReg nodes that copy values to virtual registers
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/// for export to other blocks need to be emitted before any terminator
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/// instruction, but they have no other ordering requirements. We bunch them
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/// up and the emit a single tokenfactor for them just before terminator
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/// instructions.
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SmallVector<SDValue, 8> PendingExports;
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2009-12-19 07:32:53 +08:00
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/// SDNodeOrder - A unique monotonically increasing number used to order the
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/// SDNodes we create.
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unsigned SDNodeOrder;
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2015-04-24 00:45:24 +08:00
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enum CaseClusterKind {
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/// A cluster of adjacent case labels with the same destination, or just one
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/// case.
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CC_Range,
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/// A cluster of cases suitable for jump table lowering.
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CC_JumpTable,
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/// A cluster of cases suitable for bit test lowering.
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CC_BitTests
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};
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/// A cluster of case labels.
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struct CaseCluster {
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CaseClusterKind Kind;
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const ConstantInt *Low, *High;
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union {
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MachineBasicBlock *MBB;
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unsigned JTCasesIndex;
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unsigned BTCasesIndex;
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};
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2015-04-28 07:52:19 +08:00
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uint32_t Weight;
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2015-04-24 00:45:24 +08:00
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static CaseCluster range(const ConstantInt *Low, const ConstantInt *High,
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MachineBasicBlock *MBB, uint32_t Weight) {
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CaseCluster C;
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C.Kind = CC_Range;
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C.Low = Low;
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C.High = High;
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C.MBB = MBB;
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C.Weight = Weight;
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return C;
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}
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2011-07-30 06:25:21 +08:00
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2015-04-24 00:45:24 +08:00
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static CaseCluster jumpTable(const ConstantInt *Low,
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const ConstantInt *High, unsigned JTCasesIndex,
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uint32_t Weight) {
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CaseCluster C;
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C.Kind = CC_JumpTable;
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C.Low = Low;
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C.High = High;
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C.JTCasesIndex = JTCasesIndex;
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C.Weight = Weight;
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return C;
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}
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2008-09-04 00:12:24 +08:00
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2015-04-24 00:45:24 +08:00
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static CaseCluster bitTests(const ConstantInt *Low, const ConstantInt *High,
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unsigned BTCasesIndex, uint32_t Weight) {
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CaseCluster C;
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C.Kind = CC_BitTests;
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C.Low = Low;
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C.High = High;
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C.BTCasesIndex = BTCasesIndex;
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C.Weight = Weight;
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return C;
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2008-09-04 00:12:24 +08:00
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}
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};
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2015-04-24 00:45:24 +08:00
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typedef std::vector<CaseCluster> CaseClusterVector;
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typedef CaseClusterVector::iterator CaseClusterIt;
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2008-09-04 00:12:24 +08:00
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struct CaseBits {
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uint64_t Mask;
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MachineBasicBlock* BB;
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unsigned Bits;
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2012-08-25 02:14:27 +08:00
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uint32_t ExtraWeight;
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2008-09-04 00:12:24 +08:00
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2012-08-25 02:14:27 +08:00
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CaseBits(uint64_t mask, MachineBasicBlock* bb, unsigned bits,
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uint32_t Weight):
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Mask(mask), BB(bb), Bits(bits), ExtraWeight(Weight) { }
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2008-09-04 00:12:24 +08:00
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2015-04-24 00:45:24 +08:00
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CaseBits() : Mask(0), BB(nullptr), Bits(0), ExtraWeight(0) {}
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2008-09-04 00:12:24 +08:00
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};
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2015-04-24 00:45:24 +08:00
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typedef std::vector<CaseBits> CaseBitsVector;
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2008-09-04 00:12:24 +08:00
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2015-04-24 00:45:24 +08:00
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/// Sort Clusters and merge adjacent cases.
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void sortAndRangeify(CaseClusterVector &Clusters);
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2008-12-24 06:25:27 +08:00
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2009-11-24 02:04:58 +08:00
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/// CaseBlock - This structure is used to communicate between
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/// SelectionDAGBuilder and SDISel for the code generation of additional basic
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/// blocks needed by multi-case switch statements.
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2008-09-04 00:12:24 +08:00
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struct CaseBlock {
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2010-04-15 09:51:59 +08:00
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CaseBlock(ISD::CondCode cc, const Value *cmplhs, const Value *cmprhs,
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const Value *cmpmiddle,
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2008-09-04 00:12:24 +08:00
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MachineBasicBlock *truebb, MachineBasicBlock *falsebb,
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2011-07-30 06:25:21 +08:00
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MachineBasicBlock *me,
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uint32_t trueweight = 0, uint32_t falseweight = 0)
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2008-09-04 00:12:24 +08:00
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: CC(cc), CmpLHS(cmplhs), CmpMHS(cmpmiddle), CmpRHS(cmprhs),
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2011-07-30 06:25:21 +08:00
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TrueBB(truebb), FalseBB(falsebb), ThisBB(me),
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TrueWeight(trueweight), FalseWeight(falseweight) { }
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2008-09-04 00:12:24 +08:00
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// CC - the condition code to use for the case block's setcc node
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ISD::CondCode CC;
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2011-07-30 06:25:21 +08:00
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2008-09-04 00:12:24 +08:00
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// CmpLHS/CmpRHS/CmpMHS - The LHS/MHS/RHS of the comparison to emit.
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// Emit by default LHS op RHS. MHS is used for range comparisons:
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// If MHS is not null: (LHS <= MHS) and (MHS <= RHS).
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2010-04-15 09:51:59 +08:00
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const Value *CmpLHS, *CmpMHS, *CmpRHS;
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2011-07-30 06:25:21 +08:00
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2008-09-04 00:12:24 +08:00
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// TrueBB/FalseBB - the block to branch to if the setcc is true/false.
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MachineBasicBlock *TrueBB, *FalseBB;
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2011-07-30 06:25:21 +08:00
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2008-09-04 00:12:24 +08:00
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// ThisBB - the block into which to emit the code for the setcc and branches
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MachineBasicBlock *ThisBB;
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2011-07-30 06:25:21 +08:00
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// TrueWeight/FalseWeight - branch weights.
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uint32_t TrueWeight, FalseWeight;
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2008-09-04 00:12:24 +08:00
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};
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2011-07-30 06:25:21 +08:00
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2008-09-04 00:12:24 +08:00
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struct JumpTable {
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JumpTable(unsigned R, unsigned J, MachineBasicBlock *M,
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MachineBasicBlock *D): Reg(R), JTI(J), MBB(M), Default(D) {}
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2013-11-01 01:18:07 +08:00
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2008-09-04 00:12:24 +08:00
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/// Reg - the virtual register containing the index of the jump table entry
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//. to jump to.
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unsigned Reg;
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/// JTI - the JumpTableIndex for this jump table in the function.
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unsigned JTI;
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/// MBB - the MBB into which to emit the code for the indirect jump.
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MachineBasicBlock *MBB;
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/// Default - the MBB of the default bb, which is a successor of the range
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/// check MBB. This is when updating PHI nodes in successors.
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MachineBasicBlock *Default;
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};
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struct JumpTableHeader {
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2010-04-15 09:51:59 +08:00
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JumpTableHeader(APInt F, APInt L, const Value *SV, MachineBasicBlock *H,
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2008-09-04 00:12:24 +08:00
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bool E = false):
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First(F), Last(L), SValue(SV), HeaderBB(H), Emitted(E) {}
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2008-12-24 06:25:27 +08:00
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APInt First;
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APInt Last;
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2010-04-15 09:51:59 +08:00
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const Value *SValue;
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2008-09-04 00:12:24 +08:00
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MachineBasicBlock *HeaderBB;
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bool Emitted;
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};
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typedef std::pair<JumpTableHeader, JumpTable> JumpTableBlock;
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struct BitTestCase {
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2012-08-25 02:14:27 +08:00
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BitTestCase(uint64_t M, MachineBasicBlock* T, MachineBasicBlock* Tr,
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uint32_t Weight):
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Mask(M), ThisBB(T), TargetBB(Tr), ExtraWeight(Weight) { }
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2008-09-04 00:12:24 +08:00
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uint64_t Mask;
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2010-01-02 07:37:34 +08:00
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MachineBasicBlock *ThisBB;
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MachineBasicBlock *TargetBB;
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2012-08-25 02:14:27 +08:00
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uint32_t ExtraWeight;
|
2008-09-04 00:12:24 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
typedef SmallVector<BitTestCase, 3> BitTestInfo;
|
|
|
|
|
|
|
|
struct BitTestBlock {
|
2010-04-15 09:51:59 +08:00
|
|
|
BitTestBlock(APInt F, APInt R, const Value* SV,
|
2012-12-19 20:23:01 +08:00
|
|
|
unsigned Rg, MVT RgVT, bool E,
|
2008-09-04 00:12:24 +08:00
|
|
|
MachineBasicBlock* P, MachineBasicBlock* D,
|
2014-10-05 00:55:56 +08:00
|
|
|
BitTestInfo C):
|
2011-01-06 09:02:44 +08:00
|
|
|
First(F), Range(R), SValue(SV), Reg(Rg), RegVT(RgVT), Emitted(E),
|
2014-10-05 00:55:56 +08:00
|
|
|
Parent(P), Default(D), Cases(std::move(C)) { }
|
2008-12-24 06:25:27 +08:00
|
|
|
APInt First;
|
|
|
|
APInt Range;
|
2010-04-15 09:51:59 +08:00
|
|
|
const Value *SValue;
|
2008-09-04 00:12:24 +08:00
|
|
|
unsigned Reg;
|
2012-12-19 20:23:01 +08:00
|
|
|
MVT RegVT;
|
2008-09-04 00:12:24 +08:00
|
|
|
bool Emitted;
|
|
|
|
MachineBasicBlock *Parent;
|
|
|
|
MachineBasicBlock *Default;
|
|
|
|
BitTestInfo Cases;
|
|
|
|
};
|
|
|
|
|
2015-04-24 00:45:24 +08:00
|
|
|
/// Minimum jump table density, in percent.
|
|
|
|
enum { MinJumpTableDensity = 40 };
|
|
|
|
|
|
|
|
/// Check whether a range of clusters is dense enough for a jump table.
|
|
|
|
bool isDense(const CaseClusterVector &Clusters, unsigned *TotalCases,
|
|
|
|
unsigned First, unsigned Last);
|
|
|
|
|
|
|
|
/// Build a jump table cluster from Clusters[First..Last]. Returns false if it
|
|
|
|
/// decides it's not a good idea.
|
|
|
|
bool buildJumpTable(CaseClusterVector &Clusters, unsigned First,
|
|
|
|
unsigned Last, const SwitchInst *SI,
|
|
|
|
MachineBasicBlock *DefaultMBB, CaseCluster &JTCluster);
|
|
|
|
|
|
|
|
/// Find clusters of cases suitable for jump table lowering.
|
|
|
|
void findJumpTables(CaseClusterVector &Clusters, const SwitchInst *SI,
|
|
|
|
MachineBasicBlock *DefaultMBB);
|
|
|
|
|
|
|
|
/// Check whether the range [Low,High] fits in a machine word.
|
|
|
|
bool rangeFitsInWord(const APInt &Low, const APInt &High);
|
|
|
|
|
|
|
|
/// Check whether these clusters are suitable for lowering with bit tests based
|
|
|
|
/// on the number of destinations, comparison metric, and range.
|
|
|
|
bool isSuitableForBitTests(unsigned NumDests, unsigned NumCmps,
|
|
|
|
const APInt &Low, const APInt &High);
|
|
|
|
|
|
|
|
/// Build a bit test cluster from Clusters[First..Last]. Returns false if it
|
|
|
|
/// decides it's not a good idea.
|
|
|
|
bool buildBitTests(CaseClusterVector &Clusters, unsigned First, unsigned Last,
|
|
|
|
const SwitchInst *SI, CaseCluster &BTCluster);
|
|
|
|
|
|
|
|
/// Find clusters of cases suitable for bit test lowering.
|
|
|
|
void findBitTestClusters(CaseClusterVector &Clusters, const SwitchInst *SI);
|
|
|
|
|
|
|
|
struct SwitchWorkListItem {
|
|
|
|
MachineBasicBlock *MBB;
|
|
|
|
CaseClusterIt FirstCluster;
|
|
|
|
CaseClusterIt LastCluster;
|
|
|
|
const ConstantInt *GE;
|
|
|
|
const ConstantInt *LT;
|
|
|
|
};
|
|
|
|
typedef SmallVector<SwitchWorkListItem, 4> SwitchWorkList;
|
|
|
|
|
Switch lowering: add heuristic for filling leaf nodes in the weight-balanced binary search tree
Sparse switches with profile info are lowered as weight-balanced BSTs. For
example, if the node weights are {1,1,1,1,1,1000}, the right-most node would
end up in a tree by itself, bringing it closer to the top.
However, a leaf in this BST can contain up to 3 cases, and having a single
case in a leaf node as in the example means the tree might become
unnecessarily high.
This patch adds a heauristic to the pivot selection algorithm that moves more
cases into leaf nodes unless that would lower their rank. It still doesn't
yield the optimal tree in every case, but I believe it's conservatibely correct.
llvm-svn: 240224
2015-06-21 01:14:07 +08:00
|
|
|
/// Determine the rank by weight of CC in [First,Last]. If CC has more weight
|
|
|
|
/// than each cluster in the range, its rank is 0.
|
|
|
|
static unsigned caseClusterRank(const CaseCluster &CC, CaseClusterIt First,
|
|
|
|
CaseClusterIt Last);
|
|
|
|
|
2015-04-24 00:45:24 +08:00
|
|
|
/// Emit comparison and split W into two subtrees.
|
|
|
|
void splitWorkItem(SwitchWorkList &WorkList, const SwitchWorkListItem &W,
|
|
|
|
Value *Cond, MachineBasicBlock *SwitchMBB);
|
|
|
|
|
|
|
|
/// Lower W.
|
|
|
|
void lowerWorkItem(SwitchWorkListItem W, Value *Cond,
|
|
|
|
MachineBasicBlock *SwitchMBB,
|
|
|
|
MachineBasicBlock *DefaultMBB);
|
|
|
|
|
|
|
|
|
Teach selectiondag how to handle the stackprotectorcheck intrinsic.
Previously, generation of stack protectors was done exclusively in the
pre-SelectionDAG Codegen LLVM IR Pass "Stack Protector". This necessitated
splitting basic blocks at the IR level to create the success/failure basic
blocks in the tail of the basic block in question. As a result of this,
calls that would have qualified for the sibling call optimization were no
longer eligible for optimization since said calls were no longer right in
the "tail position" (i.e. the immediate predecessor of a ReturnInst
instruction).
Then it was noticed that since the sibling call optimization causes the
callee to reuse the caller's stack, if we could delay the generation of
the stack protector check until later in CodeGen after the sibling call
decision was made, we get both the tail call optimization and the stack
protector check!
A few goals in solving this problem were:
1. Preserve the architecture independence of stack protector generation.
2. Preserve the normal IR level stack protector check for platforms like
OpenBSD for which we support platform specific stack protector
generation.
The main problem that guided the present solution is that one can not
solve this problem in an architecture independent manner at the IR level
only. This is because:
1. The decision on whether or not to perform a sibling call on certain
platforms (for instance i386) requires lower level information
related to available registers that can not be known at the IR level.
2. Even if the previous point were not true, the decision on whether to
perform a tail call is done in LowerCallTo in SelectionDAG which
occurs after the Stack Protector Pass. As a result, one would need to
put the relevant callinst into the stack protector check success
basic block (where the return inst is placed) and then move it back
later at SelectionDAG/MI time before the stack protector check if the
tail call optimization failed. The MI level option was nixed
immediately since it would require platform specific pattern
matching. The SelectionDAG level option was nixed because
SelectionDAG only processes one IR level basic block at a time
implying one could not create a DAG Combine to move the callinst.
To get around this problem a few things were realized:
1. While one can not handle multiple IR level basic blocks at the
SelectionDAG Level, one can generate multiple machine basic blocks
for one IR level basic block. This is how we handle bit tests and
switches.
2. At the MI level, tail calls are represented via a special return
MIInst called "tcreturn". Thus if we know the basic block in which we
wish to insert the stack protector check, we get the correct behavior
by always inserting the stack protector check right before the return
statement. This is a "magical transformation" since no matter where
the stack protector check intrinsic is, we always insert the stack
protector check code at the end of the BB.
Given the aforementioned constraints, the following solution was devised:
1. On platforms that do not support SelectionDAG stack protector check
generation, allow for the normal IR level stack protector check
generation to continue.
2. On platforms that do support SelectionDAG stack protector check
generation:
a. Use the IR level stack protector pass to decide if a stack
protector is required/which BB we insert the stack protector check
in by reusing the logic already therein. If we wish to generate a
stack protector check in a basic block, we place a special IR
intrinsic called llvm.stackprotectorcheck right before the BB's
returninst or if there is a callinst that could potentially be
sibling call optimized, before the call inst.
b. Then when a BB with said intrinsic is processed, we codegen the BB
normally via SelectBasicBlock. In said process, when we visit the
stack protector check, we do not actually emit anything into the
BB. Instead, we just initialize the stack protector descriptor
class (which involves stashing information/creating the success
mbbb and the failure mbb if we have not created one for this
function yet) and export the guard variable that we are going to
compare.
c. After we finish selecting the basic block, in FinishBasicBlock if
the StackProtectorDescriptor attached to the SelectionDAGBuilder is
initialized, we first find a splice point in the parent basic block
before the terminator and then splice the terminator of said basic
block into the success basic block. Then we code-gen a new tail for
the parent basic block consisting of the two loads, the comparison,
and finally two branches to the success/failure basic blocks. We
conclude by code-gening the failure basic block if we have not
code-gened it already (all stack protector checks we generate in
the same function, use the same failure basic block).
llvm-svn: 188755
2013-08-20 15:00:16 +08:00
|
|
|
/// A class which encapsulates all of the information needed to generate a
|
|
|
|
/// stack protector check and signals to isel via its state being initialized
|
|
|
|
/// that a stack protector needs to be generated.
|
|
|
|
///
|
|
|
|
/// *NOTE* The following is a high level documentation of SelectionDAG Stack
|
|
|
|
/// Protector Generation. The reason that it is placed here is for a lack of
|
|
|
|
/// other good places to stick it.
|
|
|
|
///
|
|
|
|
/// High Level Overview of SelectionDAG Stack Protector Generation:
|
|
|
|
///
|
|
|
|
/// Previously, generation of stack protectors was done exclusively in the
|
|
|
|
/// pre-SelectionDAG Codegen LLVM IR Pass "Stack Protector". This necessitated
|
|
|
|
/// splitting basic blocks at the IR level to create the success/failure basic
|
|
|
|
/// blocks in the tail of the basic block in question. As a result of this,
|
|
|
|
/// calls that would have qualified for the sibling call optimization were no
|
|
|
|
/// longer eligible for optimization since said calls were no longer right in
|
|
|
|
/// the "tail position" (i.e. the immediate predecessor of a ReturnInst
|
|
|
|
/// instruction).
|
|
|
|
///
|
|
|
|
/// Then it was noticed that since the sibling call optimization causes the
|
|
|
|
/// callee to reuse the caller's stack, if we could delay the generation of
|
|
|
|
/// the stack protector check until later in CodeGen after the sibling call
|
|
|
|
/// decision was made, we get both the tail call optimization and the stack
|
|
|
|
/// protector check!
|
|
|
|
///
|
|
|
|
/// A few goals in solving this problem were:
|
|
|
|
///
|
|
|
|
/// 1. Preserve the architecture independence of stack protector generation.
|
|
|
|
///
|
|
|
|
/// 2. Preserve the normal IR level stack protector check for platforms like
|
2014-07-01 02:57:16 +08:00
|
|
|
/// OpenBSD for which we support platform-specific stack protector
|
Teach selectiondag how to handle the stackprotectorcheck intrinsic.
Previously, generation of stack protectors was done exclusively in the
pre-SelectionDAG Codegen LLVM IR Pass "Stack Protector". This necessitated
splitting basic blocks at the IR level to create the success/failure basic
blocks in the tail of the basic block in question. As a result of this,
calls that would have qualified for the sibling call optimization were no
longer eligible for optimization since said calls were no longer right in
the "tail position" (i.e. the immediate predecessor of a ReturnInst
instruction).
Then it was noticed that since the sibling call optimization causes the
callee to reuse the caller's stack, if we could delay the generation of
the stack protector check until later in CodeGen after the sibling call
decision was made, we get both the tail call optimization and the stack
protector check!
A few goals in solving this problem were:
1. Preserve the architecture independence of stack protector generation.
2. Preserve the normal IR level stack protector check for platforms like
OpenBSD for which we support platform specific stack protector
generation.
The main problem that guided the present solution is that one can not
solve this problem in an architecture independent manner at the IR level
only. This is because:
1. The decision on whether or not to perform a sibling call on certain
platforms (for instance i386) requires lower level information
related to available registers that can not be known at the IR level.
2. Even if the previous point were not true, the decision on whether to
perform a tail call is done in LowerCallTo in SelectionDAG which
occurs after the Stack Protector Pass. As a result, one would need to
put the relevant callinst into the stack protector check success
basic block (where the return inst is placed) and then move it back
later at SelectionDAG/MI time before the stack protector check if the
tail call optimization failed. The MI level option was nixed
immediately since it would require platform specific pattern
matching. The SelectionDAG level option was nixed because
SelectionDAG only processes one IR level basic block at a time
implying one could not create a DAG Combine to move the callinst.
To get around this problem a few things were realized:
1. While one can not handle multiple IR level basic blocks at the
SelectionDAG Level, one can generate multiple machine basic blocks
for one IR level basic block. This is how we handle bit tests and
switches.
2. At the MI level, tail calls are represented via a special return
MIInst called "tcreturn". Thus if we know the basic block in which we
wish to insert the stack protector check, we get the correct behavior
by always inserting the stack protector check right before the return
statement. This is a "magical transformation" since no matter where
the stack protector check intrinsic is, we always insert the stack
protector check code at the end of the BB.
Given the aforementioned constraints, the following solution was devised:
1. On platforms that do not support SelectionDAG stack protector check
generation, allow for the normal IR level stack protector check
generation to continue.
2. On platforms that do support SelectionDAG stack protector check
generation:
a. Use the IR level stack protector pass to decide if a stack
protector is required/which BB we insert the stack protector check
in by reusing the logic already therein. If we wish to generate a
stack protector check in a basic block, we place a special IR
intrinsic called llvm.stackprotectorcheck right before the BB's
returninst or if there is a callinst that could potentially be
sibling call optimized, before the call inst.
b. Then when a BB with said intrinsic is processed, we codegen the BB
normally via SelectBasicBlock. In said process, when we visit the
stack protector check, we do not actually emit anything into the
BB. Instead, we just initialize the stack protector descriptor
class (which involves stashing information/creating the success
mbbb and the failure mbb if we have not created one for this
function yet) and export the guard variable that we are going to
compare.
c. After we finish selecting the basic block, in FinishBasicBlock if
the StackProtectorDescriptor attached to the SelectionDAGBuilder is
initialized, we first find a splice point in the parent basic block
before the terminator and then splice the terminator of said basic
block into the success basic block. Then we code-gen a new tail for
the parent basic block consisting of the two loads, the comparison,
and finally two branches to the success/failure basic blocks. We
conclude by code-gening the failure basic block if we have not
code-gened it already (all stack protector checks we generate in
the same function, use the same failure basic block).
llvm-svn: 188755
2013-08-20 15:00:16 +08:00
|
|
|
/// generation.
|
|
|
|
///
|
|
|
|
/// The main problem that guided the present solution is that one can not
|
|
|
|
/// solve this problem in an architecture independent manner at the IR level
|
|
|
|
/// only. This is because:
|
|
|
|
///
|
|
|
|
/// 1. The decision on whether or not to perform a sibling call on certain
|
|
|
|
/// platforms (for instance i386) requires lower level information
|
|
|
|
/// related to available registers that can not be known at the IR level.
|
|
|
|
///
|
|
|
|
/// 2. Even if the previous point were not true, the decision on whether to
|
|
|
|
/// perform a tail call is done in LowerCallTo in SelectionDAG which
|
|
|
|
/// occurs after the Stack Protector Pass. As a result, one would need to
|
|
|
|
/// put the relevant callinst into the stack protector check success
|
|
|
|
/// basic block (where the return inst is placed) and then move it back
|
|
|
|
/// later at SelectionDAG/MI time before the stack protector check if the
|
|
|
|
/// tail call optimization failed. The MI level option was nixed
|
2014-07-01 02:57:16 +08:00
|
|
|
/// immediately since it would require platform-specific pattern
|
Teach selectiondag how to handle the stackprotectorcheck intrinsic.
Previously, generation of stack protectors was done exclusively in the
pre-SelectionDAG Codegen LLVM IR Pass "Stack Protector". This necessitated
splitting basic blocks at the IR level to create the success/failure basic
blocks in the tail of the basic block in question. As a result of this,
calls that would have qualified for the sibling call optimization were no
longer eligible for optimization since said calls were no longer right in
the "tail position" (i.e. the immediate predecessor of a ReturnInst
instruction).
Then it was noticed that since the sibling call optimization causes the
callee to reuse the caller's stack, if we could delay the generation of
the stack protector check until later in CodeGen after the sibling call
decision was made, we get both the tail call optimization and the stack
protector check!
A few goals in solving this problem were:
1. Preserve the architecture independence of stack protector generation.
2. Preserve the normal IR level stack protector check for platforms like
OpenBSD for which we support platform specific stack protector
generation.
The main problem that guided the present solution is that one can not
solve this problem in an architecture independent manner at the IR level
only. This is because:
1. The decision on whether or not to perform a sibling call on certain
platforms (for instance i386) requires lower level information
related to available registers that can not be known at the IR level.
2. Even if the previous point were not true, the decision on whether to
perform a tail call is done in LowerCallTo in SelectionDAG which
occurs after the Stack Protector Pass. As a result, one would need to
put the relevant callinst into the stack protector check success
basic block (where the return inst is placed) and then move it back
later at SelectionDAG/MI time before the stack protector check if the
tail call optimization failed. The MI level option was nixed
immediately since it would require platform specific pattern
matching. The SelectionDAG level option was nixed because
SelectionDAG only processes one IR level basic block at a time
implying one could not create a DAG Combine to move the callinst.
To get around this problem a few things were realized:
1. While one can not handle multiple IR level basic blocks at the
SelectionDAG Level, one can generate multiple machine basic blocks
for one IR level basic block. This is how we handle bit tests and
switches.
2. At the MI level, tail calls are represented via a special return
MIInst called "tcreturn". Thus if we know the basic block in which we
wish to insert the stack protector check, we get the correct behavior
by always inserting the stack protector check right before the return
statement. This is a "magical transformation" since no matter where
the stack protector check intrinsic is, we always insert the stack
protector check code at the end of the BB.
Given the aforementioned constraints, the following solution was devised:
1. On platforms that do not support SelectionDAG stack protector check
generation, allow for the normal IR level stack protector check
generation to continue.
2. On platforms that do support SelectionDAG stack protector check
generation:
a. Use the IR level stack protector pass to decide if a stack
protector is required/which BB we insert the stack protector check
in by reusing the logic already therein. If we wish to generate a
stack protector check in a basic block, we place a special IR
intrinsic called llvm.stackprotectorcheck right before the BB's
returninst or if there is a callinst that could potentially be
sibling call optimized, before the call inst.
b. Then when a BB with said intrinsic is processed, we codegen the BB
normally via SelectBasicBlock. In said process, when we visit the
stack protector check, we do not actually emit anything into the
BB. Instead, we just initialize the stack protector descriptor
class (which involves stashing information/creating the success
mbbb and the failure mbb if we have not created one for this
function yet) and export the guard variable that we are going to
compare.
c. After we finish selecting the basic block, in FinishBasicBlock if
the StackProtectorDescriptor attached to the SelectionDAGBuilder is
initialized, we first find a splice point in the parent basic block
before the terminator and then splice the terminator of said basic
block into the success basic block. Then we code-gen a new tail for
the parent basic block consisting of the two loads, the comparison,
and finally two branches to the success/failure basic blocks. We
conclude by code-gening the failure basic block if we have not
code-gened it already (all stack protector checks we generate in
the same function, use the same failure basic block).
llvm-svn: 188755
2013-08-20 15:00:16 +08:00
|
|
|
/// matching. The SelectionDAG level option was nixed because
|
|
|
|
/// SelectionDAG only processes one IR level basic block at a time
|
|
|
|
/// implying one could not create a DAG Combine to move the callinst.
|
|
|
|
///
|
|
|
|
/// To get around this problem a few things were realized:
|
|
|
|
///
|
|
|
|
/// 1. While one can not handle multiple IR level basic blocks at the
|
|
|
|
/// SelectionDAG Level, one can generate multiple machine basic blocks
|
|
|
|
/// for one IR level basic block. This is how we handle bit tests and
|
|
|
|
/// switches.
|
|
|
|
///
|
|
|
|
/// 2. At the MI level, tail calls are represented via a special return
|
|
|
|
/// MIInst called "tcreturn". Thus if we know the basic block in which we
|
|
|
|
/// wish to insert the stack protector check, we get the correct behavior
|
|
|
|
/// by always inserting the stack protector check right before the return
|
|
|
|
/// statement. This is a "magical transformation" since no matter where
|
|
|
|
/// the stack protector check intrinsic is, we always insert the stack
|
|
|
|
/// protector check code at the end of the BB.
|
|
|
|
///
|
|
|
|
/// Given the aforementioned constraints, the following solution was devised:
|
|
|
|
///
|
|
|
|
/// 1. On platforms that do not support SelectionDAG stack protector check
|
|
|
|
/// generation, allow for the normal IR level stack protector check
|
|
|
|
/// generation to continue.
|
|
|
|
///
|
|
|
|
/// 2. On platforms that do support SelectionDAG stack protector check
|
|
|
|
/// generation:
|
|
|
|
///
|
|
|
|
/// a. Use the IR level stack protector pass to decide if a stack
|
|
|
|
/// protector is required/which BB we insert the stack protector check
|
|
|
|
/// in by reusing the logic already therein. If we wish to generate a
|
|
|
|
/// stack protector check in a basic block, we place a special IR
|
|
|
|
/// intrinsic called llvm.stackprotectorcheck right before the BB's
|
|
|
|
/// returninst or if there is a callinst that could potentially be
|
|
|
|
/// sibling call optimized, before the call inst.
|
|
|
|
///
|
|
|
|
/// b. Then when a BB with said intrinsic is processed, we codegen the BB
|
|
|
|
/// normally via SelectBasicBlock. In said process, when we visit the
|
|
|
|
/// stack protector check, we do not actually emit anything into the
|
|
|
|
/// BB. Instead, we just initialize the stack protector descriptor
|
|
|
|
/// class (which involves stashing information/creating the success
|
|
|
|
/// mbbb and the failure mbb if we have not created one for this
|
|
|
|
/// function yet) and export the guard variable that we are going to
|
|
|
|
/// compare.
|
|
|
|
///
|
|
|
|
/// c. After we finish selecting the basic block, in FinishBasicBlock if
|
|
|
|
/// the StackProtectorDescriptor attached to the SelectionDAGBuilder is
|
|
|
|
/// initialized, we first find a splice point in the parent basic block
|
|
|
|
/// before the terminator and then splice the terminator of said basic
|
|
|
|
/// block into the success basic block. Then we code-gen a new tail for
|
|
|
|
/// the parent basic block consisting of the two loads, the comparison,
|
|
|
|
/// and finally two branches to the success/failure basic blocks. We
|
|
|
|
/// conclude by code-gening the failure basic block if we have not
|
|
|
|
/// code-gened it already (all stack protector checks we generate in
|
|
|
|
/// the same function, use the same failure basic block).
|
|
|
|
class StackProtectorDescriptor {
|
|
|
|
public:
|
2014-04-16 12:21:27 +08:00
|
|
|
StackProtectorDescriptor() : ParentMBB(nullptr), SuccessMBB(nullptr),
|
2014-07-26 03:31:34 +08:00
|
|
|
FailureMBB(nullptr), Guard(nullptr),
|
|
|
|
GuardReg(0) { }
|
Teach selectiondag how to handle the stackprotectorcheck intrinsic.
Previously, generation of stack protectors was done exclusively in the
pre-SelectionDAG Codegen LLVM IR Pass "Stack Protector". This necessitated
splitting basic blocks at the IR level to create the success/failure basic
blocks in the tail of the basic block in question. As a result of this,
calls that would have qualified for the sibling call optimization were no
longer eligible for optimization since said calls were no longer right in
the "tail position" (i.e. the immediate predecessor of a ReturnInst
instruction).
Then it was noticed that since the sibling call optimization causes the
callee to reuse the caller's stack, if we could delay the generation of
the stack protector check until later in CodeGen after the sibling call
decision was made, we get both the tail call optimization and the stack
protector check!
A few goals in solving this problem were:
1. Preserve the architecture independence of stack protector generation.
2. Preserve the normal IR level stack protector check for platforms like
OpenBSD for which we support platform specific stack protector
generation.
The main problem that guided the present solution is that one can not
solve this problem in an architecture independent manner at the IR level
only. This is because:
1. The decision on whether or not to perform a sibling call on certain
platforms (for instance i386) requires lower level information
related to available registers that can not be known at the IR level.
2. Even if the previous point were not true, the decision on whether to
perform a tail call is done in LowerCallTo in SelectionDAG which
occurs after the Stack Protector Pass. As a result, one would need to
put the relevant callinst into the stack protector check success
basic block (where the return inst is placed) and then move it back
later at SelectionDAG/MI time before the stack protector check if the
tail call optimization failed. The MI level option was nixed
immediately since it would require platform specific pattern
matching. The SelectionDAG level option was nixed because
SelectionDAG only processes one IR level basic block at a time
implying one could not create a DAG Combine to move the callinst.
To get around this problem a few things were realized:
1. While one can not handle multiple IR level basic blocks at the
SelectionDAG Level, one can generate multiple machine basic blocks
for one IR level basic block. This is how we handle bit tests and
switches.
2. At the MI level, tail calls are represented via a special return
MIInst called "tcreturn". Thus if we know the basic block in which we
wish to insert the stack protector check, we get the correct behavior
by always inserting the stack protector check right before the return
statement. This is a "magical transformation" since no matter where
the stack protector check intrinsic is, we always insert the stack
protector check code at the end of the BB.
Given the aforementioned constraints, the following solution was devised:
1. On platforms that do not support SelectionDAG stack protector check
generation, allow for the normal IR level stack protector check
generation to continue.
2. On platforms that do support SelectionDAG stack protector check
generation:
a. Use the IR level stack protector pass to decide if a stack
protector is required/which BB we insert the stack protector check
in by reusing the logic already therein. If we wish to generate a
stack protector check in a basic block, we place a special IR
intrinsic called llvm.stackprotectorcheck right before the BB's
returninst or if there is a callinst that could potentially be
sibling call optimized, before the call inst.
b. Then when a BB with said intrinsic is processed, we codegen the BB
normally via SelectBasicBlock. In said process, when we visit the
stack protector check, we do not actually emit anything into the
BB. Instead, we just initialize the stack protector descriptor
class (which involves stashing information/creating the success
mbbb and the failure mbb if we have not created one for this
function yet) and export the guard variable that we are going to
compare.
c. After we finish selecting the basic block, in FinishBasicBlock if
the StackProtectorDescriptor attached to the SelectionDAGBuilder is
initialized, we first find a splice point in the parent basic block
before the terminator and then splice the terminator of said basic
block into the success basic block. Then we code-gen a new tail for
the parent basic block consisting of the two loads, the comparison,
and finally two branches to the success/failure basic blocks. We
conclude by code-gening the failure basic block if we have not
code-gened it already (all stack protector checks we generate in
the same function, use the same failure basic block).
llvm-svn: 188755
2013-08-20 15:00:16 +08:00
|
|
|
|
|
|
|
/// Returns true if all fields of the stack protector descriptor are
|
|
|
|
/// initialized implying that we should/are ready to emit a stack protector.
|
|
|
|
bool shouldEmitStackProtector() const {
|
|
|
|
return ParentMBB && SuccessMBB && FailureMBB && Guard;
|
|
|
|
}
|
|
|
|
|
|
|
|
/// Initialize the stack protector descriptor structure for a new basic
|
|
|
|
/// block.
|
|
|
|
void initialize(const BasicBlock *BB,
|
|
|
|
MachineBasicBlock *MBB,
|
|
|
|
const CallInst &StackProtCheckCall) {
|
|
|
|
// Make sure we are not initialized yet.
|
|
|
|
assert(!shouldEmitStackProtector() && "Stack Protector Descriptor is "
|
|
|
|
"already initialized!");
|
|
|
|
ParentMBB = MBB;
|
2014-12-01 12:27:03 +08:00
|
|
|
SuccessMBB = AddSuccessorMBB(BB, MBB, /* IsLikely */ true);
|
|
|
|
FailureMBB = AddSuccessorMBB(BB, MBB, /* IsLikely */ false, FailureMBB);
|
Teach selectiondag how to handle the stackprotectorcheck intrinsic.
Previously, generation of stack protectors was done exclusively in the
pre-SelectionDAG Codegen LLVM IR Pass "Stack Protector". This necessitated
splitting basic blocks at the IR level to create the success/failure basic
blocks in the tail of the basic block in question. As a result of this,
calls that would have qualified for the sibling call optimization were no
longer eligible for optimization since said calls were no longer right in
the "tail position" (i.e. the immediate predecessor of a ReturnInst
instruction).
Then it was noticed that since the sibling call optimization causes the
callee to reuse the caller's stack, if we could delay the generation of
the stack protector check until later in CodeGen after the sibling call
decision was made, we get both the tail call optimization and the stack
protector check!
A few goals in solving this problem were:
1. Preserve the architecture independence of stack protector generation.
2. Preserve the normal IR level stack protector check for platforms like
OpenBSD for which we support platform specific stack protector
generation.
The main problem that guided the present solution is that one can not
solve this problem in an architecture independent manner at the IR level
only. This is because:
1. The decision on whether or not to perform a sibling call on certain
platforms (for instance i386) requires lower level information
related to available registers that can not be known at the IR level.
2. Even if the previous point were not true, the decision on whether to
perform a tail call is done in LowerCallTo in SelectionDAG which
occurs after the Stack Protector Pass. As a result, one would need to
put the relevant callinst into the stack protector check success
basic block (where the return inst is placed) and then move it back
later at SelectionDAG/MI time before the stack protector check if the
tail call optimization failed. The MI level option was nixed
immediately since it would require platform specific pattern
matching. The SelectionDAG level option was nixed because
SelectionDAG only processes one IR level basic block at a time
implying one could not create a DAG Combine to move the callinst.
To get around this problem a few things were realized:
1. While one can not handle multiple IR level basic blocks at the
SelectionDAG Level, one can generate multiple machine basic blocks
for one IR level basic block. This is how we handle bit tests and
switches.
2. At the MI level, tail calls are represented via a special return
MIInst called "tcreturn". Thus if we know the basic block in which we
wish to insert the stack protector check, we get the correct behavior
by always inserting the stack protector check right before the return
statement. This is a "magical transformation" since no matter where
the stack protector check intrinsic is, we always insert the stack
protector check code at the end of the BB.
Given the aforementioned constraints, the following solution was devised:
1. On platforms that do not support SelectionDAG stack protector check
generation, allow for the normal IR level stack protector check
generation to continue.
2. On platforms that do support SelectionDAG stack protector check
generation:
a. Use the IR level stack protector pass to decide if a stack
protector is required/which BB we insert the stack protector check
in by reusing the logic already therein. If we wish to generate a
stack protector check in a basic block, we place a special IR
intrinsic called llvm.stackprotectorcheck right before the BB's
returninst or if there is a callinst that could potentially be
sibling call optimized, before the call inst.
b. Then when a BB with said intrinsic is processed, we codegen the BB
normally via SelectBasicBlock. In said process, when we visit the
stack protector check, we do not actually emit anything into the
BB. Instead, we just initialize the stack protector descriptor
class (which involves stashing information/creating the success
mbbb and the failure mbb if we have not created one for this
function yet) and export the guard variable that we are going to
compare.
c. After we finish selecting the basic block, in FinishBasicBlock if
the StackProtectorDescriptor attached to the SelectionDAGBuilder is
initialized, we first find a splice point in the parent basic block
before the terminator and then splice the terminator of said basic
block into the success basic block. Then we code-gen a new tail for
the parent basic block consisting of the two loads, the comparison,
and finally two branches to the success/failure basic blocks. We
conclude by code-gening the failure basic block if we have not
code-gened it already (all stack protector checks we generate in
the same function, use the same failure basic block).
llvm-svn: 188755
2013-08-20 15:00:16 +08:00
|
|
|
if (!Guard)
|
|
|
|
Guard = StackProtCheckCall.getArgOperand(0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/// Reset state that changes when we handle different basic blocks.
|
|
|
|
///
|
|
|
|
/// This currently includes:
|
|
|
|
///
|
|
|
|
/// 1. The specific basic block we are generating a
|
|
|
|
/// stack protector for (ParentMBB).
|
|
|
|
///
|
|
|
|
/// 2. The successor machine basic block that will contain the tail of
|
|
|
|
/// parent mbb after we create the stack protector check (SuccessMBB). This
|
|
|
|
/// BB is visited only on stack protector check success.
|
|
|
|
void resetPerBBState() {
|
2014-04-16 12:21:27 +08:00
|
|
|
ParentMBB = nullptr;
|
|
|
|
SuccessMBB = nullptr;
|
Teach selectiondag how to handle the stackprotectorcheck intrinsic.
Previously, generation of stack protectors was done exclusively in the
pre-SelectionDAG Codegen LLVM IR Pass "Stack Protector". This necessitated
splitting basic blocks at the IR level to create the success/failure basic
blocks in the tail of the basic block in question. As a result of this,
calls that would have qualified for the sibling call optimization were no
longer eligible for optimization since said calls were no longer right in
the "tail position" (i.e. the immediate predecessor of a ReturnInst
instruction).
Then it was noticed that since the sibling call optimization causes the
callee to reuse the caller's stack, if we could delay the generation of
the stack protector check until later in CodeGen after the sibling call
decision was made, we get both the tail call optimization and the stack
protector check!
A few goals in solving this problem were:
1. Preserve the architecture independence of stack protector generation.
2. Preserve the normal IR level stack protector check for platforms like
OpenBSD for which we support platform specific stack protector
generation.
The main problem that guided the present solution is that one can not
solve this problem in an architecture independent manner at the IR level
only. This is because:
1. The decision on whether or not to perform a sibling call on certain
platforms (for instance i386) requires lower level information
related to available registers that can not be known at the IR level.
2. Even if the previous point were not true, the decision on whether to
perform a tail call is done in LowerCallTo in SelectionDAG which
occurs after the Stack Protector Pass. As a result, one would need to
put the relevant callinst into the stack protector check success
basic block (where the return inst is placed) and then move it back
later at SelectionDAG/MI time before the stack protector check if the
tail call optimization failed. The MI level option was nixed
immediately since it would require platform specific pattern
matching. The SelectionDAG level option was nixed because
SelectionDAG only processes one IR level basic block at a time
implying one could not create a DAG Combine to move the callinst.
To get around this problem a few things were realized:
1. While one can not handle multiple IR level basic blocks at the
SelectionDAG Level, one can generate multiple machine basic blocks
for one IR level basic block. This is how we handle bit tests and
switches.
2. At the MI level, tail calls are represented via a special return
MIInst called "tcreturn". Thus if we know the basic block in which we
wish to insert the stack protector check, we get the correct behavior
by always inserting the stack protector check right before the return
statement. This is a "magical transformation" since no matter where
the stack protector check intrinsic is, we always insert the stack
protector check code at the end of the BB.
Given the aforementioned constraints, the following solution was devised:
1. On platforms that do not support SelectionDAG stack protector check
generation, allow for the normal IR level stack protector check
generation to continue.
2. On platforms that do support SelectionDAG stack protector check
generation:
a. Use the IR level stack protector pass to decide if a stack
protector is required/which BB we insert the stack protector check
in by reusing the logic already therein. If we wish to generate a
stack protector check in a basic block, we place a special IR
intrinsic called llvm.stackprotectorcheck right before the BB's
returninst or if there is a callinst that could potentially be
sibling call optimized, before the call inst.
b. Then when a BB with said intrinsic is processed, we codegen the BB
normally via SelectBasicBlock. In said process, when we visit the
stack protector check, we do not actually emit anything into the
BB. Instead, we just initialize the stack protector descriptor
class (which involves stashing information/creating the success
mbbb and the failure mbb if we have not created one for this
function yet) and export the guard variable that we are going to
compare.
c. After we finish selecting the basic block, in FinishBasicBlock if
the StackProtectorDescriptor attached to the SelectionDAGBuilder is
initialized, we first find a splice point in the parent basic block
before the terminator and then splice the terminator of said basic
block into the success basic block. Then we code-gen a new tail for
the parent basic block consisting of the two loads, the comparison,
and finally two branches to the success/failure basic blocks. We
conclude by code-gening the failure basic block if we have not
code-gened it already (all stack protector checks we generate in
the same function, use the same failure basic block).
llvm-svn: 188755
2013-08-20 15:00:16 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/// Reset state that only changes when we switch functions.
|
|
|
|
///
|
|
|
|
/// This currently includes:
|
|
|
|
///
|
|
|
|
/// 1. FailureMBB since we reuse the failure code path for all stack
|
|
|
|
/// protector checks created in an individual function.
|
|
|
|
///
|
|
|
|
/// 2.The guard variable since the guard variable we are checking against is
|
|
|
|
/// always the same.
|
|
|
|
void resetPerFunctionState() {
|
2014-04-16 12:21:27 +08:00
|
|
|
FailureMBB = nullptr;
|
|
|
|
Guard = nullptr;
|
Teach selectiondag how to handle the stackprotectorcheck intrinsic.
Previously, generation of stack protectors was done exclusively in the
pre-SelectionDAG Codegen LLVM IR Pass "Stack Protector". This necessitated
splitting basic blocks at the IR level to create the success/failure basic
blocks in the tail of the basic block in question. As a result of this,
calls that would have qualified for the sibling call optimization were no
longer eligible for optimization since said calls were no longer right in
the "tail position" (i.e. the immediate predecessor of a ReturnInst
instruction).
Then it was noticed that since the sibling call optimization causes the
callee to reuse the caller's stack, if we could delay the generation of
the stack protector check until later in CodeGen after the sibling call
decision was made, we get both the tail call optimization and the stack
protector check!
A few goals in solving this problem were:
1. Preserve the architecture independence of stack protector generation.
2. Preserve the normal IR level stack protector check for platforms like
OpenBSD for which we support platform specific stack protector
generation.
The main problem that guided the present solution is that one can not
solve this problem in an architecture independent manner at the IR level
only. This is because:
1. The decision on whether or not to perform a sibling call on certain
platforms (for instance i386) requires lower level information
related to available registers that can not be known at the IR level.
2. Even if the previous point were not true, the decision on whether to
perform a tail call is done in LowerCallTo in SelectionDAG which
occurs after the Stack Protector Pass. As a result, one would need to
put the relevant callinst into the stack protector check success
basic block (where the return inst is placed) and then move it back
later at SelectionDAG/MI time before the stack protector check if the
tail call optimization failed. The MI level option was nixed
immediately since it would require platform specific pattern
matching. The SelectionDAG level option was nixed because
SelectionDAG only processes one IR level basic block at a time
implying one could not create a DAG Combine to move the callinst.
To get around this problem a few things were realized:
1. While one can not handle multiple IR level basic blocks at the
SelectionDAG Level, one can generate multiple machine basic blocks
for one IR level basic block. This is how we handle bit tests and
switches.
2. At the MI level, tail calls are represented via a special return
MIInst called "tcreturn". Thus if we know the basic block in which we
wish to insert the stack protector check, we get the correct behavior
by always inserting the stack protector check right before the return
statement. This is a "magical transformation" since no matter where
the stack protector check intrinsic is, we always insert the stack
protector check code at the end of the BB.
Given the aforementioned constraints, the following solution was devised:
1. On platforms that do not support SelectionDAG stack protector check
generation, allow for the normal IR level stack protector check
generation to continue.
2. On platforms that do support SelectionDAG stack protector check
generation:
a. Use the IR level stack protector pass to decide if a stack
protector is required/which BB we insert the stack protector check
in by reusing the logic already therein. If we wish to generate a
stack protector check in a basic block, we place a special IR
intrinsic called llvm.stackprotectorcheck right before the BB's
returninst or if there is a callinst that could potentially be
sibling call optimized, before the call inst.
b. Then when a BB with said intrinsic is processed, we codegen the BB
normally via SelectBasicBlock. In said process, when we visit the
stack protector check, we do not actually emit anything into the
BB. Instead, we just initialize the stack protector descriptor
class (which involves stashing information/creating the success
mbbb and the failure mbb if we have not created one for this
function yet) and export the guard variable that we are going to
compare.
c. After we finish selecting the basic block, in FinishBasicBlock if
the StackProtectorDescriptor attached to the SelectionDAGBuilder is
initialized, we first find a splice point in the parent basic block
before the terminator and then splice the terminator of said basic
block into the success basic block. Then we code-gen a new tail for
the parent basic block consisting of the two loads, the comparison,
and finally two branches to the success/failure basic blocks. We
conclude by code-gening the failure basic block if we have not
code-gened it already (all stack protector checks we generate in
the same function, use the same failure basic block).
llvm-svn: 188755
2013-08-20 15:00:16 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
MachineBasicBlock *getParentMBB() { return ParentMBB; }
|
|
|
|
MachineBasicBlock *getSuccessMBB() { return SuccessMBB; }
|
|
|
|
MachineBasicBlock *getFailureMBB() { return FailureMBB; }
|
|
|
|
const Value *getGuard() { return Guard; }
|
|
|
|
|
2014-07-26 03:31:34 +08:00
|
|
|
unsigned getGuardReg() const { return GuardReg; }
|
|
|
|
void setGuardReg(unsigned R) { GuardReg = R; }
|
|
|
|
|
Teach selectiondag how to handle the stackprotectorcheck intrinsic.
Previously, generation of stack protectors was done exclusively in the
pre-SelectionDAG Codegen LLVM IR Pass "Stack Protector". This necessitated
splitting basic blocks at the IR level to create the success/failure basic
blocks in the tail of the basic block in question. As a result of this,
calls that would have qualified for the sibling call optimization were no
longer eligible for optimization since said calls were no longer right in
the "tail position" (i.e. the immediate predecessor of a ReturnInst
instruction).
Then it was noticed that since the sibling call optimization causes the
callee to reuse the caller's stack, if we could delay the generation of
the stack protector check until later in CodeGen after the sibling call
decision was made, we get both the tail call optimization and the stack
protector check!
A few goals in solving this problem were:
1. Preserve the architecture independence of stack protector generation.
2. Preserve the normal IR level stack protector check for platforms like
OpenBSD for which we support platform specific stack protector
generation.
The main problem that guided the present solution is that one can not
solve this problem in an architecture independent manner at the IR level
only. This is because:
1. The decision on whether or not to perform a sibling call on certain
platforms (for instance i386) requires lower level information
related to available registers that can not be known at the IR level.
2. Even if the previous point were not true, the decision on whether to
perform a tail call is done in LowerCallTo in SelectionDAG which
occurs after the Stack Protector Pass. As a result, one would need to
put the relevant callinst into the stack protector check success
basic block (where the return inst is placed) and then move it back
later at SelectionDAG/MI time before the stack protector check if the
tail call optimization failed. The MI level option was nixed
immediately since it would require platform specific pattern
matching. The SelectionDAG level option was nixed because
SelectionDAG only processes one IR level basic block at a time
implying one could not create a DAG Combine to move the callinst.
To get around this problem a few things were realized:
1. While one can not handle multiple IR level basic blocks at the
SelectionDAG Level, one can generate multiple machine basic blocks
for one IR level basic block. This is how we handle bit tests and
switches.
2. At the MI level, tail calls are represented via a special return
MIInst called "tcreturn". Thus if we know the basic block in which we
wish to insert the stack protector check, we get the correct behavior
by always inserting the stack protector check right before the return
statement. This is a "magical transformation" since no matter where
the stack protector check intrinsic is, we always insert the stack
protector check code at the end of the BB.
Given the aforementioned constraints, the following solution was devised:
1. On platforms that do not support SelectionDAG stack protector check
generation, allow for the normal IR level stack protector check
generation to continue.
2. On platforms that do support SelectionDAG stack protector check
generation:
a. Use the IR level stack protector pass to decide if a stack
protector is required/which BB we insert the stack protector check
in by reusing the logic already therein. If we wish to generate a
stack protector check in a basic block, we place a special IR
intrinsic called llvm.stackprotectorcheck right before the BB's
returninst or if there is a callinst that could potentially be
sibling call optimized, before the call inst.
b. Then when a BB with said intrinsic is processed, we codegen the BB
normally via SelectBasicBlock. In said process, when we visit the
stack protector check, we do not actually emit anything into the
BB. Instead, we just initialize the stack protector descriptor
class (which involves stashing information/creating the success
mbbb and the failure mbb if we have not created one for this
function yet) and export the guard variable that we are going to
compare.
c. After we finish selecting the basic block, in FinishBasicBlock if
the StackProtectorDescriptor attached to the SelectionDAGBuilder is
initialized, we first find a splice point in the parent basic block
before the terminator and then splice the terminator of said basic
block into the success basic block. Then we code-gen a new tail for
the parent basic block consisting of the two loads, the comparison,
and finally two branches to the success/failure basic blocks. We
conclude by code-gening the failure basic block if we have not
code-gened it already (all stack protector checks we generate in
the same function, use the same failure basic block).
llvm-svn: 188755
2013-08-20 15:00:16 +08:00
|
|
|
private:
|
|
|
|
/// The basic block for which we are generating the stack protector.
|
|
|
|
///
|
|
|
|
/// As a result of stack protector generation, we will splice the
|
|
|
|
/// terminators of this basic block into the successor mbb SuccessMBB and
|
|
|
|
/// replace it with a compare/branch to the successor mbbs
|
|
|
|
/// SuccessMBB/FailureMBB depending on whether or not the stack protector
|
|
|
|
/// was violated.
|
|
|
|
MachineBasicBlock *ParentMBB;
|
|
|
|
|
|
|
|
/// A basic block visited on stack protector check success that contains the
|
|
|
|
/// terminators of ParentMBB.
|
|
|
|
MachineBasicBlock *SuccessMBB;
|
|
|
|
|
|
|
|
/// This basic block visited on stack protector check failure that will
|
|
|
|
/// contain a call to __stack_chk_fail().
|
|
|
|
MachineBasicBlock *FailureMBB;
|
|
|
|
|
|
|
|
/// The guard variable which we will compare against the stored value in the
|
|
|
|
/// stack protector stack slot.
|
|
|
|
const Value *Guard;
|
|
|
|
|
2014-07-26 03:31:34 +08:00
|
|
|
/// The virtual register holding the stack guard value.
|
|
|
|
unsigned GuardReg;
|
|
|
|
|
Teach selectiondag how to handle the stackprotectorcheck intrinsic.
Previously, generation of stack protectors was done exclusively in the
pre-SelectionDAG Codegen LLVM IR Pass "Stack Protector". This necessitated
splitting basic blocks at the IR level to create the success/failure basic
blocks in the tail of the basic block in question. As a result of this,
calls that would have qualified for the sibling call optimization were no
longer eligible for optimization since said calls were no longer right in
the "tail position" (i.e. the immediate predecessor of a ReturnInst
instruction).
Then it was noticed that since the sibling call optimization causes the
callee to reuse the caller's stack, if we could delay the generation of
the stack protector check until later in CodeGen after the sibling call
decision was made, we get both the tail call optimization and the stack
protector check!
A few goals in solving this problem were:
1. Preserve the architecture independence of stack protector generation.
2. Preserve the normal IR level stack protector check for platforms like
OpenBSD for which we support platform specific stack protector
generation.
The main problem that guided the present solution is that one can not
solve this problem in an architecture independent manner at the IR level
only. This is because:
1. The decision on whether or not to perform a sibling call on certain
platforms (for instance i386) requires lower level information
related to available registers that can not be known at the IR level.
2. Even if the previous point were not true, the decision on whether to
perform a tail call is done in LowerCallTo in SelectionDAG which
occurs after the Stack Protector Pass. As a result, one would need to
put the relevant callinst into the stack protector check success
basic block (where the return inst is placed) and then move it back
later at SelectionDAG/MI time before the stack protector check if the
tail call optimization failed. The MI level option was nixed
immediately since it would require platform specific pattern
matching. The SelectionDAG level option was nixed because
SelectionDAG only processes one IR level basic block at a time
implying one could not create a DAG Combine to move the callinst.
To get around this problem a few things were realized:
1. While one can not handle multiple IR level basic blocks at the
SelectionDAG Level, one can generate multiple machine basic blocks
for one IR level basic block. This is how we handle bit tests and
switches.
2. At the MI level, tail calls are represented via a special return
MIInst called "tcreturn". Thus if we know the basic block in which we
wish to insert the stack protector check, we get the correct behavior
by always inserting the stack protector check right before the return
statement. This is a "magical transformation" since no matter where
the stack protector check intrinsic is, we always insert the stack
protector check code at the end of the BB.
Given the aforementioned constraints, the following solution was devised:
1. On platforms that do not support SelectionDAG stack protector check
generation, allow for the normal IR level stack protector check
generation to continue.
2. On platforms that do support SelectionDAG stack protector check
generation:
a. Use the IR level stack protector pass to decide if a stack
protector is required/which BB we insert the stack protector check
in by reusing the logic already therein. If we wish to generate a
stack protector check in a basic block, we place a special IR
intrinsic called llvm.stackprotectorcheck right before the BB's
returninst or if there is a callinst that could potentially be
sibling call optimized, before the call inst.
b. Then when a BB with said intrinsic is processed, we codegen the BB
normally via SelectBasicBlock. In said process, when we visit the
stack protector check, we do not actually emit anything into the
BB. Instead, we just initialize the stack protector descriptor
class (which involves stashing information/creating the success
mbbb and the failure mbb if we have not created one for this
function yet) and export the guard variable that we are going to
compare.
c. After we finish selecting the basic block, in FinishBasicBlock if
the StackProtectorDescriptor attached to the SelectionDAGBuilder is
initialized, we first find a splice point in the parent basic block
before the terminator and then splice the terminator of said basic
block into the success basic block. Then we code-gen a new tail for
the parent basic block consisting of the two loads, the comparison,
and finally two branches to the success/failure basic blocks. We
conclude by code-gening the failure basic block if we have not
code-gened it already (all stack protector checks we generate in
the same function, use the same failure basic block).
llvm-svn: 188755
2013-08-20 15:00:16 +08:00
|
|
|
/// Add a successor machine basic block to ParentMBB. If the successor mbb
|
|
|
|
/// has not been created yet (i.e. if SuccMBB = 0), then the machine basic
|
2014-12-01 12:27:03 +08:00
|
|
|
/// block will be created. Assign a large weight if IsLikely is true.
|
Teach selectiondag how to handle the stackprotectorcheck intrinsic.
Previously, generation of stack protectors was done exclusively in the
pre-SelectionDAG Codegen LLVM IR Pass "Stack Protector". This necessitated
splitting basic blocks at the IR level to create the success/failure basic
blocks in the tail of the basic block in question. As a result of this,
calls that would have qualified for the sibling call optimization were no
longer eligible for optimization since said calls were no longer right in
the "tail position" (i.e. the immediate predecessor of a ReturnInst
instruction).
Then it was noticed that since the sibling call optimization causes the
callee to reuse the caller's stack, if we could delay the generation of
the stack protector check until later in CodeGen after the sibling call
decision was made, we get both the tail call optimization and the stack
protector check!
A few goals in solving this problem were:
1. Preserve the architecture independence of stack protector generation.
2. Preserve the normal IR level stack protector check for platforms like
OpenBSD for which we support platform specific stack protector
generation.
The main problem that guided the present solution is that one can not
solve this problem in an architecture independent manner at the IR level
only. This is because:
1. The decision on whether or not to perform a sibling call on certain
platforms (for instance i386) requires lower level information
related to available registers that can not be known at the IR level.
2. Even if the previous point were not true, the decision on whether to
perform a tail call is done in LowerCallTo in SelectionDAG which
occurs after the Stack Protector Pass. As a result, one would need to
put the relevant callinst into the stack protector check success
basic block (where the return inst is placed) and then move it back
later at SelectionDAG/MI time before the stack protector check if the
tail call optimization failed. The MI level option was nixed
immediately since it would require platform specific pattern
matching. The SelectionDAG level option was nixed because
SelectionDAG only processes one IR level basic block at a time
implying one could not create a DAG Combine to move the callinst.
To get around this problem a few things were realized:
1. While one can not handle multiple IR level basic blocks at the
SelectionDAG Level, one can generate multiple machine basic blocks
for one IR level basic block. This is how we handle bit tests and
switches.
2. At the MI level, tail calls are represented via a special return
MIInst called "tcreturn". Thus if we know the basic block in which we
wish to insert the stack protector check, we get the correct behavior
by always inserting the stack protector check right before the return
statement. This is a "magical transformation" since no matter where
the stack protector check intrinsic is, we always insert the stack
protector check code at the end of the BB.
Given the aforementioned constraints, the following solution was devised:
1. On platforms that do not support SelectionDAG stack protector check
generation, allow for the normal IR level stack protector check
generation to continue.
2. On platforms that do support SelectionDAG stack protector check
generation:
a. Use the IR level stack protector pass to decide if a stack
protector is required/which BB we insert the stack protector check
in by reusing the logic already therein. If we wish to generate a
stack protector check in a basic block, we place a special IR
intrinsic called llvm.stackprotectorcheck right before the BB's
returninst or if there is a callinst that could potentially be
sibling call optimized, before the call inst.
b. Then when a BB with said intrinsic is processed, we codegen the BB
normally via SelectBasicBlock. In said process, when we visit the
stack protector check, we do not actually emit anything into the
BB. Instead, we just initialize the stack protector descriptor
class (which involves stashing information/creating the success
mbbb and the failure mbb if we have not created one for this
function yet) and export the guard variable that we are going to
compare.
c. After we finish selecting the basic block, in FinishBasicBlock if
the StackProtectorDescriptor attached to the SelectionDAGBuilder is
initialized, we first find a splice point in the parent basic block
before the terminator and then splice the terminator of said basic
block into the success basic block. Then we code-gen a new tail for
the parent basic block consisting of the two loads, the comparison,
and finally two branches to the success/failure basic blocks. We
conclude by code-gening the failure basic block if we have not
code-gened it already (all stack protector checks we generate in
the same function, use the same failure basic block).
llvm-svn: 188755
2013-08-20 15:00:16 +08:00
|
|
|
MachineBasicBlock *AddSuccessorMBB(const BasicBlock *BB,
|
|
|
|
MachineBasicBlock *ParentMBB,
|
2014-12-01 12:27:03 +08:00
|
|
|
bool IsLikely,
|
2014-04-16 12:21:27 +08:00
|
|
|
MachineBasicBlock *SuccMBB = nullptr);
|
Teach selectiondag how to handle the stackprotectorcheck intrinsic.
Previously, generation of stack protectors was done exclusively in the
pre-SelectionDAG Codegen LLVM IR Pass "Stack Protector". This necessitated
splitting basic blocks at the IR level to create the success/failure basic
blocks in the tail of the basic block in question. As a result of this,
calls that would have qualified for the sibling call optimization were no
longer eligible for optimization since said calls were no longer right in
the "tail position" (i.e. the immediate predecessor of a ReturnInst
instruction).
Then it was noticed that since the sibling call optimization causes the
callee to reuse the caller's stack, if we could delay the generation of
the stack protector check until later in CodeGen after the sibling call
decision was made, we get both the tail call optimization and the stack
protector check!
A few goals in solving this problem were:
1. Preserve the architecture independence of stack protector generation.
2. Preserve the normal IR level stack protector check for platforms like
OpenBSD for which we support platform specific stack protector
generation.
The main problem that guided the present solution is that one can not
solve this problem in an architecture independent manner at the IR level
only. This is because:
1. The decision on whether or not to perform a sibling call on certain
platforms (for instance i386) requires lower level information
related to available registers that can not be known at the IR level.
2. Even if the previous point were not true, the decision on whether to
perform a tail call is done in LowerCallTo in SelectionDAG which
occurs after the Stack Protector Pass. As a result, one would need to
put the relevant callinst into the stack protector check success
basic block (where the return inst is placed) and then move it back
later at SelectionDAG/MI time before the stack protector check if the
tail call optimization failed. The MI level option was nixed
immediately since it would require platform specific pattern
matching. The SelectionDAG level option was nixed because
SelectionDAG only processes one IR level basic block at a time
implying one could not create a DAG Combine to move the callinst.
To get around this problem a few things were realized:
1. While one can not handle multiple IR level basic blocks at the
SelectionDAG Level, one can generate multiple machine basic blocks
for one IR level basic block. This is how we handle bit tests and
switches.
2. At the MI level, tail calls are represented via a special return
MIInst called "tcreturn". Thus if we know the basic block in which we
wish to insert the stack protector check, we get the correct behavior
by always inserting the stack protector check right before the return
statement. This is a "magical transformation" since no matter where
the stack protector check intrinsic is, we always insert the stack
protector check code at the end of the BB.
Given the aforementioned constraints, the following solution was devised:
1. On platforms that do not support SelectionDAG stack protector check
generation, allow for the normal IR level stack protector check
generation to continue.
2. On platforms that do support SelectionDAG stack protector check
generation:
a. Use the IR level stack protector pass to decide if a stack
protector is required/which BB we insert the stack protector check
in by reusing the logic already therein. If we wish to generate a
stack protector check in a basic block, we place a special IR
intrinsic called llvm.stackprotectorcheck right before the BB's
returninst or if there is a callinst that could potentially be
sibling call optimized, before the call inst.
b. Then when a BB with said intrinsic is processed, we codegen the BB
normally via SelectBasicBlock. In said process, when we visit the
stack protector check, we do not actually emit anything into the
BB. Instead, we just initialize the stack protector descriptor
class (which involves stashing information/creating the success
mbbb and the failure mbb if we have not created one for this
function yet) and export the guard variable that we are going to
compare.
c. After we finish selecting the basic block, in FinishBasicBlock if
the StackProtectorDescriptor attached to the SelectionDAGBuilder is
initialized, we first find a splice point in the parent basic block
before the terminator and then splice the terminator of said basic
block into the success basic block. Then we code-gen a new tail for
the parent basic block consisting of the two loads, the comparison,
and finally two branches to the success/failure basic blocks. We
conclude by code-gening the failure basic block if we have not
code-gened it already (all stack protector checks we generate in
the same function, use the same failure basic block).
llvm-svn: 188755
2013-08-20 15:00:16 +08:00
|
|
|
};
|
|
|
|
|
2013-06-20 05:36:55 +08:00
|
|
|
private:
|
2010-04-20 03:05:59 +08:00
|
|
|
const TargetMachine &TM;
|
2013-06-20 05:36:55 +08:00
|
|
|
public:
|
2014-01-12 22:09:17 +08:00
|
|
|
/// Lowest valid SDNodeOrder. The special case 0 is reserved for scheduling
|
|
|
|
/// nodes without a corresponding SDNode.
|
|
|
|
static const unsigned LowestSDNodeOrder = 1;
|
|
|
|
|
2008-09-04 00:12:24 +08:00
|
|
|
SelectionDAG &DAG;
|
2014-02-22 02:34:28 +08:00
|
|
|
const DataLayout *DL;
|
2008-09-04 00:12:24 +08:00
|
|
|
AliasAnalysis *AA;
|
2011-12-09 06:15:21 +08:00
|
|
|
const TargetLibraryInfo *LibInfo;
|
2008-09-04 00:12:24 +08:00
|
|
|
|
|
|
|
/// SwitchCases - Vector of CaseBlock structures used to communicate
|
|
|
|
/// SwitchInst code generation information.
|
|
|
|
std::vector<CaseBlock> SwitchCases;
|
|
|
|
/// JTCases - Vector of JumpTable structures used to communicate
|
|
|
|
/// SwitchInst code generation information.
|
|
|
|
std::vector<JumpTableBlock> JTCases;
|
|
|
|
/// BitTestCases - Vector of BitTestBlock structures used to communicate
|
|
|
|
/// SwitchInst code generation information.
|
|
|
|
std::vector<BitTestBlock> BitTestCases;
|
Teach selectiondag how to handle the stackprotectorcheck intrinsic.
Previously, generation of stack protectors was done exclusively in the
pre-SelectionDAG Codegen LLVM IR Pass "Stack Protector". This necessitated
splitting basic blocks at the IR level to create the success/failure basic
blocks in the tail of the basic block in question. As a result of this,
calls that would have qualified for the sibling call optimization were no
longer eligible for optimization since said calls were no longer right in
the "tail position" (i.e. the immediate predecessor of a ReturnInst
instruction).
Then it was noticed that since the sibling call optimization causes the
callee to reuse the caller's stack, if we could delay the generation of
the stack protector check until later in CodeGen after the sibling call
decision was made, we get both the tail call optimization and the stack
protector check!
A few goals in solving this problem were:
1. Preserve the architecture independence of stack protector generation.
2. Preserve the normal IR level stack protector check for platforms like
OpenBSD for which we support platform specific stack protector
generation.
The main problem that guided the present solution is that one can not
solve this problem in an architecture independent manner at the IR level
only. This is because:
1. The decision on whether or not to perform a sibling call on certain
platforms (for instance i386) requires lower level information
related to available registers that can not be known at the IR level.
2. Even if the previous point were not true, the decision on whether to
perform a tail call is done in LowerCallTo in SelectionDAG which
occurs after the Stack Protector Pass. As a result, one would need to
put the relevant callinst into the stack protector check success
basic block (where the return inst is placed) and then move it back
later at SelectionDAG/MI time before the stack protector check if the
tail call optimization failed. The MI level option was nixed
immediately since it would require platform specific pattern
matching. The SelectionDAG level option was nixed because
SelectionDAG only processes one IR level basic block at a time
implying one could not create a DAG Combine to move the callinst.
To get around this problem a few things were realized:
1. While one can not handle multiple IR level basic blocks at the
SelectionDAG Level, one can generate multiple machine basic blocks
for one IR level basic block. This is how we handle bit tests and
switches.
2. At the MI level, tail calls are represented via a special return
MIInst called "tcreturn". Thus if we know the basic block in which we
wish to insert the stack protector check, we get the correct behavior
by always inserting the stack protector check right before the return
statement. This is a "magical transformation" since no matter where
the stack protector check intrinsic is, we always insert the stack
protector check code at the end of the BB.
Given the aforementioned constraints, the following solution was devised:
1. On platforms that do not support SelectionDAG stack protector check
generation, allow for the normal IR level stack protector check
generation to continue.
2. On platforms that do support SelectionDAG stack protector check
generation:
a. Use the IR level stack protector pass to decide if a stack
protector is required/which BB we insert the stack protector check
in by reusing the logic already therein. If we wish to generate a
stack protector check in a basic block, we place a special IR
intrinsic called llvm.stackprotectorcheck right before the BB's
returninst or if there is a callinst that could potentially be
sibling call optimized, before the call inst.
b. Then when a BB with said intrinsic is processed, we codegen the BB
normally via SelectBasicBlock. In said process, when we visit the
stack protector check, we do not actually emit anything into the
BB. Instead, we just initialize the stack protector descriptor
class (which involves stashing information/creating the success
mbbb and the failure mbb if we have not created one for this
function yet) and export the guard variable that we are going to
compare.
c. After we finish selecting the basic block, in FinishBasicBlock if
the StackProtectorDescriptor attached to the SelectionDAGBuilder is
initialized, we first find a splice point in the parent basic block
before the terminator and then splice the terminator of said basic
block into the success basic block. Then we code-gen a new tail for
the parent basic block consisting of the two loads, the comparison,
and finally two branches to the success/failure basic blocks. We
conclude by code-gening the failure basic block if we have not
code-gened it already (all stack protector checks we generate in
the same function, use the same failure basic block).
llvm-svn: 188755
2013-08-20 15:00:16 +08:00
|
|
|
/// A StackProtectorDescriptor structure used to communicate stack protector
|
|
|
|
/// information in between SelectBasicBlock and FinishBasicBlock.
|
|
|
|
StackProtectorDescriptor SPDescriptor;
|
2009-09-19 05:02:19 +08:00
|
|
|
|
2008-09-04 00:12:24 +08:00
|
|
|
// Emit PHI-node-operand constants only once even if used by multiple
|
|
|
|
// PHI nodes.
|
2010-04-15 09:51:59 +08:00
|
|
|
DenseMap<const Constant *, unsigned> ConstantsOut;
|
2008-09-04 00:12:24 +08:00
|
|
|
|
|
|
|
/// FuncInfo - Information about the function as a whole.
|
|
|
|
///
|
|
|
|
FunctionLoweringInfo &FuncInfo;
|
2009-02-20 05:12:54 +08:00
|
|
|
|
2009-04-29 08:15:41 +08:00
|
|
|
/// OptLevel - What optimization level we're generating code for.
|
2013-11-01 01:18:07 +08:00
|
|
|
///
|
2009-04-30 07:29:43 +08:00
|
|
|
CodeGenOpt::Level OptLevel;
|
2013-11-01 01:18:07 +08:00
|
|
|
|
2008-09-04 00:12:24 +08:00
|
|
|
/// GFI - Garbage collection metadata for the function.
|
|
|
|
GCFunctionInfo *GFI;
|
|
|
|
|
2011-10-06 06:24:35 +08:00
|
|
|
/// LPadToCallSiteMap - Map a landing pad to the call site indexes.
|
|
|
|
DenseMap<MachineBasicBlock*, SmallVector<unsigned, 4> > LPadToCallSiteMap;
|
2011-10-05 06:00:35 +08:00
|
|
|
|
Major calling convention code refactoring.
Instead of awkwardly encoding calling-convention information with ISD::CALL,
ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering
provides three virtual functions for targets to override:
LowerFormalArguments, LowerCall, and LowerRet, which replace the custom
lowering done on the special nodes. They provide the same information, but
in a more immediately usable format.
This also reworks much of the target-independent tail call logic. The
decision of whether or not to perform a tail call is now cleanly split
between target-independent portions, and the target dependent portion
in IsEligibleForTailCallOptimization.
This also synchronizes all in-tree targets, to help enable future
refactoring and feature work.
llvm-svn: 78142
2009-08-05 09:29:28 +08:00
|
|
|
/// HasTailCall - This is set to true if a call in the current
|
|
|
|
/// block has been translated as a tail call. In this case,
|
|
|
|
/// no subsequent DAG nodes should be created.
|
|
|
|
///
|
|
|
|
bool HasTailCall;
|
|
|
|
|
2009-07-13 12:09:18 +08:00
|
|
|
LLVMContext *Context;
|
|
|
|
|
2010-04-20 03:05:59 +08:00
|
|
|
SelectionDAGBuilder(SelectionDAG &dag, FunctionLoweringInfo &funcinfo,
|
2009-11-24 02:04:58 +08:00
|
|
|
CodeGenOpt::Level ol)
|
2014-04-16 12:21:27 +08:00
|
|
|
: CurInst(nullptr), SDNodeOrder(LowestSDNodeOrder), TM(dag.getTarget()),
|
2010-04-20 03:05:59 +08:00
|
|
|
DAG(dag), FuncInfo(funcinfo), OptLevel(ol),
|
2012-08-22 08:42:39 +08:00
|
|
|
HasTailCall(false) {
|
2008-09-04 00:12:24 +08:00
|
|
|
}
|
|
|
|
|
2011-12-09 06:15:21 +08:00
|
|
|
void init(GCFunctionInfo *gfi, AliasAnalysis &aa,
|
|
|
|
const TargetLibraryInfo *li);
|
2008-09-04 00:12:24 +08:00
|
|
|
|
2010-04-15 02:24:06 +08:00
|
|
|
/// clear - Clear out the current SelectionDAG and the associated
|
2009-11-24 02:04:58 +08:00
|
|
|
/// state and prepare this SelectionDAGBuilder object to be used
|
2008-09-04 00:12:24 +08:00
|
|
|
/// for a new block. This doesn't clear out information about
|
|
|
|
/// additional blocks that are needed to complete switch lowering
|
|
|
|
/// or PHI node updating; that information is cleared out as it is
|
|
|
|
/// consumed.
|
|
|
|
void clear();
|
|
|
|
|
2011-05-24 01:44:13 +08:00
|
|
|
/// clearDanglingDebugInfo - Clear the dangling debug information
|
2012-06-02 18:20:22 +08:00
|
|
|
/// map. This function is separated from the clear so that debug
|
2011-05-24 01:44:13 +08:00
|
|
|
/// information that is dangling in a basic block can be properly
|
|
|
|
/// resolved in a different basic block. This allows the
|
|
|
|
/// SelectionDAG to resolve dangling debug information attached
|
|
|
|
/// to PHI nodes.
|
|
|
|
void clearDanglingDebugInfo();
|
|
|
|
|
2008-09-04 00:12:24 +08:00
|
|
|
/// getRoot - Return the current virtual root of the Selection DAG,
|
|
|
|
/// flushing any PendingLoad items. This must be done before emitting
|
|
|
|
/// a store or any other node that may need to be ordered after any
|
|
|
|
/// prior load instructions.
|
|
|
|
///
|
|
|
|
SDValue getRoot();
|
|
|
|
|
|
|
|
/// getControlRoot - Similar to getRoot, but instead of flushing all the
|
|
|
|
/// PendingLoad items, flush all the PendingExports items. It is necessary
|
|
|
|
/// to do this before emitting a terminator instruction.
|
|
|
|
///
|
|
|
|
SDValue getControlRoot();
|
|
|
|
|
2013-05-25 10:20:36 +08:00
|
|
|
SDLoc getCurSDLoc() const {
|
|
|
|
return SDLoc(CurInst, SDNodeOrder);
|
|
|
|
}
|
|
|
|
|
|
|
|
DebugLoc getCurDebugLoc() const {
|
|
|
|
return CurInst ? CurInst->getDebugLoc() : DebugLoc();
|
|
|
|
}
|
2011-02-22 07:21:26 +08:00
|
|
|
|
2009-12-22 10:10:19 +08:00
|
|
|
unsigned getSDNodeOrder() const { return SDNodeOrder; }
|
|
|
|
|
2010-04-15 09:51:59 +08:00
|
|
|
void CopyValueToVirtualRegister(const Value *V, unsigned Reg);
|
2008-09-04 00:12:24 +08:00
|
|
|
|
2010-04-15 09:51:59 +08:00
|
|
|
void visit(const Instruction &I);
|
2008-09-04 00:12:24 +08:00
|
|
|
|
2010-04-15 09:51:59 +08:00
|
|
|
void visit(unsigned Opcode, const User &I);
|
2008-09-04 00:12:24 +08:00
|
|
|
|
2015-03-11 00:26:48 +08:00
|
|
|
/// getCopyFromRegs - If there was virtual register allocated for the value V
|
|
|
|
/// emit CopyFromReg of the specified type Ty. Return empty SDValue() otherwise.
|
|
|
|
SDValue getCopyFromRegs(const Value *V, Type *Ty);
|
|
|
|
|
2010-07-16 08:02:08 +08:00
|
|
|
// resolveDanglingDebugInfo - if we saw an earlier dbg_value referring to V,
|
|
|
|
// generate the debug data structures now that we've seen its definition.
|
|
|
|
void resolveDanglingDebugInfo(const Value *V, SDValue Val);
|
2008-09-04 00:12:24 +08:00
|
|
|
SDValue getValue(const Value *V);
|
2015-04-28 15:57:37 +08:00
|
|
|
bool findValue(const Value *V) const;
|
|
|
|
|
2010-07-01 09:59:43 +08:00
|
|
|
SDValue getNonRegisterValue(const Value *V);
|
|
|
|
SDValue getValueImpl(const Value *V);
|
2008-09-04 00:12:24 +08:00
|
|
|
|
|
|
|
void setValue(const Value *V, SDValue NewN) {
|
|
|
|
SDValue &N = NodeMap[V];
|
2014-04-16 12:21:27 +08:00
|
|
|
assert(!N.getNode() && "Already set a value for this node!");
|
2008-09-04 00:12:24 +08:00
|
|
|
N = NewN;
|
|
|
|
}
|
2013-11-01 01:18:07 +08:00
|
|
|
|
2010-06-02 03:59:01 +08:00
|
|
|
void setUnusedArgValue(const Value *V, SDValue NewN) {
|
|
|
|
SDValue &N = UnusedArgNodeMap[V];
|
2014-04-16 12:21:27 +08:00
|
|
|
assert(!N.getNode() && "Already set a value for this node!");
|
2010-06-02 03:59:01 +08:00
|
|
|
N = NewN;
|
|
|
|
}
|
2008-09-04 00:12:24 +08:00
|
|
|
|
2010-04-15 09:51:59 +08:00
|
|
|
void FindMergedConditions(const Value *Cond, MachineBasicBlock *TBB,
|
2008-09-04 00:12:24 +08:00
|
|
|
MachineBasicBlock *FBB, MachineBasicBlock *CurBB,
|
2014-01-31 08:42:44 +08:00
|
|
|
MachineBasicBlock *SwitchBB, unsigned Opc,
|
|
|
|
uint32_t TW, uint32_t FW);
|
2010-04-15 09:51:59 +08:00
|
|
|
void EmitBranchForMergedCondition(const Value *Cond, MachineBasicBlock *TBB,
|
2008-10-18 05:16:08 +08:00
|
|
|
MachineBasicBlock *FBB,
|
2010-04-20 06:41:47 +08:00
|
|
|
MachineBasicBlock *CurBB,
|
2014-01-31 08:42:44 +08:00
|
|
|
MachineBasicBlock *SwitchBB,
|
|
|
|
uint32_t TW, uint32_t FW);
|
2008-09-04 00:12:24 +08:00
|
|
|
bool ShouldEmitAsBranches(const std::vector<CaseBlock> &Cases);
|
2010-04-15 09:51:59 +08:00
|
|
|
bool isExportableFromCurrentBlock(const Value *V, const BasicBlock *FromBB);
|
|
|
|
void CopyToExportRegsIfNeeded(const Value *V);
|
|
|
|
void ExportFromCurrentBlock(const Value *V);
|
|
|
|
void LowerCallTo(ImmutableCallSite CS, SDValue Callee, bool IsTailCall,
|
2014-04-16 12:21:27 +08:00
|
|
|
MachineBasicBlock *LandingPad = nullptr);
|
2008-09-04 00:12:24 +08:00
|
|
|
|
2014-10-18 01:39:00 +08:00
|
|
|
std::pair<SDValue, SDValue> lowerCallOperands(
|
|
|
|
ImmutableCallSite CS,
|
|
|
|
unsigned ArgIdx,
|
|
|
|
unsigned NumArgs,
|
|
|
|
SDValue Callee,
|
2015-05-06 07:06:52 +08:00
|
|
|
Type *ReturnTy,
|
2015-01-14 01:48:04 +08:00
|
|
|
MachineBasicBlock *LandingPad = nullptr,
|
|
|
|
bool IsPatchPoint = false);
|
2013-11-01 01:18:24 +08:00
|
|
|
|
2010-10-01 03:44:31 +08:00
|
|
|
/// UpdateSplitBlock - When an MBB was split during scheduling, update the
|
2014-01-11 22:01:43 +08:00
|
|
|
/// references that need to refer to the last resulting block.
|
2010-10-01 03:44:31 +08:00
|
|
|
void UpdateSplitBlock(MachineBasicBlock *First, MachineBasicBlock *Last);
|
|
|
|
|
2015-02-20 23:28:35 +08:00
|
|
|
// This function is responsible for the whole statepoint lowering process.
|
2015-03-11 00:26:48 +08:00
|
|
|
// It uniformly handles invoke and call statepoints.
|
|
|
|
void LowerStatepoint(ImmutableStatepoint Statepoint,
|
|
|
|
MachineBasicBlock *LandingPad = nullptr);
|
2008-09-04 00:12:24 +08:00
|
|
|
private:
|
2014-10-17 05:26:35 +08:00
|
|
|
std::pair<SDValue, SDValue> lowerInvokable(
|
|
|
|
TargetLowering::CallLoweringInfo &CLI,
|
|
|
|
MachineBasicBlock *LandingPad);
|
|
|
|
|
2008-09-04 00:12:24 +08:00
|
|
|
// Terminator instructions.
|
2010-04-15 09:51:59 +08:00
|
|
|
void visitRet(const ReturnInst &I);
|
|
|
|
void visitBr(const BranchInst &I);
|
|
|
|
void visitSwitch(const SwitchInst &I);
|
|
|
|
void visitIndirectBr(const IndirectBrInst &I);
|
2014-04-19 21:47:43 +08:00
|
|
|
void visitUnreachable(const UnreachableInst &I);
|
2008-09-04 00:12:24 +08:00
|
|
|
|
2011-12-21 04:03:10 +08:00
|
|
|
uint32_t getEdgeWeight(const MachineBasicBlock *Src,
|
|
|
|
const MachineBasicBlock *Dst) const;
|
2011-07-30 06:25:21 +08:00
|
|
|
void addSuccessorWithWeight(MachineBasicBlock *Src, MachineBasicBlock *Dst,
|
|
|
|
uint32_t Weight = 0);
|
2008-09-04 00:12:24 +08:00
|
|
|
public:
|
2010-04-20 06:41:47 +08:00
|
|
|
void visitSwitchCase(CaseBlock &CB,
|
|
|
|
MachineBasicBlock *SwitchBB);
|
Teach selectiondag how to handle the stackprotectorcheck intrinsic.
Previously, generation of stack protectors was done exclusively in the
pre-SelectionDAG Codegen LLVM IR Pass "Stack Protector". This necessitated
splitting basic blocks at the IR level to create the success/failure basic
blocks in the tail of the basic block in question. As a result of this,
calls that would have qualified for the sibling call optimization were no
longer eligible for optimization since said calls were no longer right in
the "tail position" (i.e. the immediate predecessor of a ReturnInst
instruction).
Then it was noticed that since the sibling call optimization causes the
callee to reuse the caller's stack, if we could delay the generation of
the stack protector check until later in CodeGen after the sibling call
decision was made, we get both the tail call optimization and the stack
protector check!
A few goals in solving this problem were:
1. Preserve the architecture independence of stack protector generation.
2. Preserve the normal IR level stack protector check for platforms like
OpenBSD for which we support platform specific stack protector
generation.
The main problem that guided the present solution is that one can not
solve this problem in an architecture independent manner at the IR level
only. This is because:
1. The decision on whether or not to perform a sibling call on certain
platforms (for instance i386) requires lower level information
related to available registers that can not be known at the IR level.
2. Even if the previous point were not true, the decision on whether to
perform a tail call is done in LowerCallTo in SelectionDAG which
occurs after the Stack Protector Pass. As a result, one would need to
put the relevant callinst into the stack protector check success
basic block (where the return inst is placed) and then move it back
later at SelectionDAG/MI time before the stack protector check if the
tail call optimization failed. The MI level option was nixed
immediately since it would require platform specific pattern
matching. The SelectionDAG level option was nixed because
SelectionDAG only processes one IR level basic block at a time
implying one could not create a DAG Combine to move the callinst.
To get around this problem a few things were realized:
1. While one can not handle multiple IR level basic blocks at the
SelectionDAG Level, one can generate multiple machine basic blocks
for one IR level basic block. This is how we handle bit tests and
switches.
2. At the MI level, tail calls are represented via a special return
MIInst called "tcreturn". Thus if we know the basic block in which we
wish to insert the stack protector check, we get the correct behavior
by always inserting the stack protector check right before the return
statement. This is a "magical transformation" since no matter where
the stack protector check intrinsic is, we always insert the stack
protector check code at the end of the BB.
Given the aforementioned constraints, the following solution was devised:
1. On platforms that do not support SelectionDAG stack protector check
generation, allow for the normal IR level stack protector check
generation to continue.
2. On platforms that do support SelectionDAG stack protector check
generation:
a. Use the IR level stack protector pass to decide if a stack
protector is required/which BB we insert the stack protector check
in by reusing the logic already therein. If we wish to generate a
stack protector check in a basic block, we place a special IR
intrinsic called llvm.stackprotectorcheck right before the BB's
returninst or if there is a callinst that could potentially be
sibling call optimized, before the call inst.
b. Then when a BB with said intrinsic is processed, we codegen the BB
normally via SelectBasicBlock. In said process, when we visit the
stack protector check, we do not actually emit anything into the
BB. Instead, we just initialize the stack protector descriptor
class (which involves stashing information/creating the success
mbbb and the failure mbb if we have not created one for this
function yet) and export the guard variable that we are going to
compare.
c. After we finish selecting the basic block, in FinishBasicBlock if
the StackProtectorDescriptor attached to the SelectionDAGBuilder is
initialized, we first find a splice point in the parent basic block
before the terminator and then splice the terminator of said basic
block into the success basic block. Then we code-gen a new tail for
the parent basic block consisting of the two loads, the comparison,
and finally two branches to the success/failure basic blocks. We
conclude by code-gening the failure basic block if we have not
code-gened it already (all stack protector checks we generate in
the same function, use the same failure basic block).
llvm-svn: 188755
2013-08-20 15:00:16 +08:00
|
|
|
void visitSPDescriptorParent(StackProtectorDescriptor &SPD,
|
|
|
|
MachineBasicBlock *ParentBB);
|
|
|
|
void visitSPDescriptorFailure(StackProtectorDescriptor &SPD);
|
2010-04-20 06:41:47 +08:00
|
|
|
void visitBitTestHeader(BitTestBlock &B, MachineBasicBlock *SwitchBB);
|
2011-01-06 09:02:44 +08:00
|
|
|
void visitBitTestCase(BitTestBlock &BB,
|
|
|
|
MachineBasicBlock* NextMBB,
|
2012-08-25 02:14:27 +08:00
|
|
|
uint32_t BranchWeightToNext,
|
2008-09-04 00:12:24 +08:00
|
|
|
unsigned Reg,
|
2010-04-20 06:41:47 +08:00
|
|
|
BitTestCase &B,
|
|
|
|
MachineBasicBlock *SwitchBB);
|
2008-09-04 00:12:24 +08:00
|
|
|
void visitJumpTable(JumpTable &JT);
|
2010-04-20 06:41:47 +08:00
|
|
|
void visitJumpTableHeader(JumpTable &JT, JumpTableHeader &JTH,
|
|
|
|
MachineBasicBlock *SwitchBB);
|
2015-01-14 09:05:27 +08:00
|
|
|
unsigned visitLandingPadClauseBB(GlobalValue *ClauseGV,
|
|
|
|
MachineBasicBlock *LPadMBB);
|
2013-11-01 01:18:07 +08:00
|
|
|
|
2008-09-04 00:12:24 +08:00
|
|
|
private:
|
|
|
|
// These all get lowered before this pass.
|
2010-04-15 09:51:59 +08:00
|
|
|
void visitInvoke(const InvokeInst &I);
|
2011-07-31 14:30:59 +08:00
|
|
|
void visitResume(const ResumeInst &I);
|
2010-04-15 09:51:59 +08:00
|
|
|
|
|
|
|
void visitBinary(const User &I, unsigned OpCode);
|
|
|
|
void visitShift(const User &I, unsigned Opcode);
|
|
|
|
void visitAdd(const User &I) { visitBinary(I, ISD::ADD); }
|
|
|
|
void visitFAdd(const User &I) { visitBinary(I, ISD::FADD); }
|
|
|
|
void visitSub(const User &I) { visitBinary(I, ISD::SUB); }
|
|
|
|
void visitFSub(const User &I);
|
|
|
|
void visitMul(const User &I) { visitBinary(I, ISD::MUL); }
|
|
|
|
void visitFMul(const User &I) { visitBinary(I, ISD::FMUL); }
|
|
|
|
void visitURem(const User &I) { visitBinary(I, ISD::UREM); }
|
|
|
|
void visitSRem(const User &I) { visitBinary(I, ISD::SREM); }
|
|
|
|
void visitFRem(const User &I) { visitBinary(I, ISD::FREM); }
|
|
|
|
void visitUDiv(const User &I) { visitBinary(I, ISD::UDIV); }
|
Emit a more efficient magic number multiplication for exact sdivs.
We have to do this in DAGBuilder instead of DAGCombiner, because the exact bit is lost after building.
struct foo { char x[24]; };
long bar(struct foo *a, struct foo *b) { return a-b; }
is now compiled into
movl 4(%esp), %eax
subl 8(%esp), %eax
sarl $3, %eax
imull $-1431655765, %eax, %eax
instead of
movl 4(%esp), %eax
subl 8(%esp), %eax
movl $715827883, %ecx
imull %ecx
movl %edx, %eax
shrl $31, %eax
sarl $2, %edx
addl %eax, %edx
movl %edx, %eax
llvm-svn: 134695
2011-07-08 18:31:30 +08:00
|
|
|
void visitSDiv(const User &I);
|
2010-04-15 09:51:59 +08:00
|
|
|
void visitFDiv(const User &I) { visitBinary(I, ISD::FDIV); }
|
|
|
|
void visitAnd (const User &I) { visitBinary(I, ISD::AND); }
|
|
|
|
void visitOr (const User &I) { visitBinary(I, ISD::OR); }
|
|
|
|
void visitXor (const User &I) { visitBinary(I, ISD::XOR); }
|
|
|
|
void visitShl (const User &I) { visitShift(I, ISD::SHL); }
|
|
|
|
void visitLShr(const User &I) { visitShift(I, ISD::SRL); }
|
|
|
|
void visitAShr(const User &I) { visitShift(I, ISD::SRA); }
|
|
|
|
void visitICmp(const User &I);
|
|
|
|
void visitFCmp(const User &I);
|
2008-09-04 00:12:24 +08:00
|
|
|
// Visit the conversion instructions
|
2010-04-15 09:51:59 +08:00
|
|
|
void visitTrunc(const User &I);
|
|
|
|
void visitZExt(const User &I);
|
|
|
|
void visitSExt(const User &I);
|
|
|
|
void visitFPTrunc(const User &I);
|
|
|
|
void visitFPExt(const User &I);
|
|
|
|
void visitFPToUI(const User &I);
|
|
|
|
void visitFPToSI(const User &I);
|
|
|
|
void visitUIToFP(const User &I);
|
|
|
|
void visitSIToFP(const User &I);
|
|
|
|
void visitPtrToInt(const User &I);
|
|
|
|
void visitIntToPtr(const User &I);
|
|
|
|
void visitBitCast(const User &I);
|
2013-11-15 09:34:59 +08:00
|
|
|
void visitAddrSpaceCast(const User &I);
|
2010-04-15 09:51:59 +08:00
|
|
|
|
|
|
|
void visitExtractElement(const User &I);
|
|
|
|
void visitInsertElement(const User &I);
|
|
|
|
void visitShuffleVector(const User &I);
|
|
|
|
|
|
|
|
void visitExtractValue(const ExtractValueInst &I);
|
|
|
|
void visitInsertValue(const InsertValueInst &I);
|
2011-08-13 04:24:12 +08:00
|
|
|
void visitLandingPad(const LandingPadInst &I);
|
2010-04-15 09:51:59 +08:00
|
|
|
|
|
|
|
void visitGetElementPtr(const User &I);
|
|
|
|
void visitSelect(const User &I);
|
|
|
|
|
|
|
|
void visitAlloca(const AllocaInst &I);
|
|
|
|
void visitLoad(const LoadInst &I);
|
|
|
|
void visitStore(const StoreInst &I);
|
2014-12-04 17:40:44 +08:00
|
|
|
void visitMaskedLoad(const CallInst &I);
|
|
|
|
void visitMaskedStore(const CallInst &I);
|
2015-04-28 15:57:37 +08:00
|
|
|
void visitMaskedGather(const CallInst &I);
|
|
|
|
void visitMaskedScatter(const CallInst &I);
|
2011-07-29 05:48:00 +08:00
|
|
|
void visitAtomicCmpXchg(const AtomicCmpXchgInst &I);
|
|
|
|
void visitAtomicRMW(const AtomicRMWInst &I);
|
2011-07-26 07:16:38 +08:00
|
|
|
void visitFence(const FenceInst &I);
|
2010-04-20 23:00:41 +08:00
|
|
|
void visitPHI(const PHINode &I);
|
2010-04-15 09:51:59 +08:00
|
|
|
void visitCall(const CallInst &I);
|
|
|
|
bool visitMemCmpCall(const CallInst &I);
|
2013-08-20 17:38:48 +08:00
|
|
|
bool visitMemChrCall(const CallInst &I);
|
2013-08-16 19:29:37 +08:00
|
|
|
bool visitStrCpyCall(const CallInst &I, bool isStpcpy);
|
2013-08-16 19:21:54 +08:00
|
|
|
bool visitStrCmpCall(const CallInst &I);
|
2013-08-16 19:41:43 +08:00
|
|
|
bool visitStrLenCall(const CallInst &I);
|
|
|
|
bool visitStrNLenCall(const CallInst &I);
|
2012-08-04 07:29:17 +08:00
|
|
|
bool visitUnaryFloatCall(const CallInst &I, unsigned Opcode);
|
2014-10-22 07:01:01 +08:00
|
|
|
bool visitBinaryFloatCall(const CallInst &I, unsigned Opcode);
|
2011-08-25 04:50:09 +08:00
|
|
|
void visitAtomicLoad(const LoadInst &I);
|
|
|
|
void visitAtomicStore(const StoreInst &I);
|
|
|
|
|
2010-04-15 09:51:59 +08:00
|
|
|
void visitInlineAsm(ImmutableCallSite CS);
|
|
|
|
const char *visitIntrinsicCall(const CallInst &I, unsigned Intrinsic);
|
|
|
|
void visitTargetIntrinsic(const CallInst &I, unsigned Intrinsic);
|
|
|
|
|
|
|
|
void visitVAStart(const CallInst &I);
|
|
|
|
void visitVAArg(const VAArgInst &I);
|
|
|
|
void visitVAEnd(const CallInst &I);
|
|
|
|
void visitVACopy(const CallInst &I);
|
2013-11-01 01:18:24 +08:00
|
|
|
void visitStackmap(const CallInst &I);
|
2014-10-18 01:39:00 +08:00
|
|
|
void visitPatchpoint(ImmutableCallSite CS,
|
|
|
|
MachineBasicBlock *LandingPad = nullptr);
|
2010-04-15 09:51:59 +08:00
|
|
|
|
[Statepoints 3/4] Statepoint infrastructure for garbage collection: SelectionDAGBuilder
This is the third patch in a small series. It contains the CodeGen support for lowering the gc.statepoint intrinsic sequences (223078) to the STATEPOINT pseudo machine instruction (223085). The change also includes the set of helper routines and classes for working with gc.statepoints, gc.relocates, and gc.results since the lowering code uses them.
With this change, gc.statepoints should be functionally complete. The documentation will follow in the fourth change, and there will likely be some cleanup changes, but interested parties can start experimenting now.
I'm not particularly happy with the amount of code or complexity involved with the lowering step, but at least it's fairly well isolated. The statepoint lowering code is split into it's own files and anyone not working on the statepoint support itself should be able to ignore it.
During the lowering process, we currently spill aggressively to stack. This is not entirely ideal (and we have plans to do better), but it's functional, relatively straight forward, and matches closely the implementations of the patchpoint intrinsics. Most of the complexity comes from trying to keep relocated copies of values in the same stack slots across statepoints. Doing so avoids the insertion of pointless load and store instructions to reshuffle the stack. The current implementation isn't as effective as I'd like, but it is functional and 'good enough' for many common use cases.
In the long term, I'd like to figure out how to integrate the statepoint lowering with the register allocator. In principal, we shouldn't need to eagerly spill at all. The register allocator should do any spilling required and the statepoint should simply record that fact. Depending on how challenging that turns out to be, we may invest in a smarter global stack slot assignment mechanism as a stop gap measure.
Reviewed by: atrick, ributzka
llvm-svn: 223137
2014-12-03 02:50:36 +08:00
|
|
|
// These three are implemented in StatepointLowering.cpp
|
|
|
|
void visitStatepoint(const CallInst &I);
|
|
|
|
void visitGCRelocate(const CallInst &I);
|
|
|
|
void visitGCResult(const CallInst &I);
|
|
|
|
|
2010-04-15 09:51:59 +08:00
|
|
|
void visitUserOp1(const Instruction &I) {
|
2009-07-15 00:55:14 +08:00
|
|
|
llvm_unreachable("UserOp1 should not exist at instruction selection time!");
|
2008-09-04 00:12:24 +08:00
|
|
|
}
|
2010-04-15 09:51:59 +08:00
|
|
|
void visitUserOp2(const Instruction &I) {
|
2009-07-15 00:55:14 +08:00
|
|
|
llvm_unreachable("UserOp2 should not exist at instruction selection time!");
|
2008-09-04 00:12:24 +08:00
|
|
|
}
|
2010-04-23 04:55:53 +08:00
|
|
|
|
2013-08-16 18:55:47 +08:00
|
|
|
void processIntegerCallValue(const Instruction &I,
|
|
|
|
SDValue Value, bool IsSigned);
|
|
|
|
|
2010-04-23 04:55:53 +08:00
|
|
|
void HandlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB);
|
2010-04-29 07:08:54 +08:00
|
|
|
|
2010-08-26 04:41:24 +08:00
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/// EmitFuncArgumentDbgValue - If V is an function argument then create
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2013-11-01 01:18:07 +08:00
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/// corresponding DBG_VALUE machine instruction for it now. At the end of
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2010-08-26 04:41:24 +08:00
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/// instruction selection, they will be inserted to the entry BB.
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2015-04-30 00:38:44 +08:00
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bool EmitFuncArgumentDbgValue(const Value *V, DILocalVariable *Variable,
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DIExpression *Expr, DILocation *DL,
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2015-04-04 03:20:26 +08:00
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int64_t Offset, bool IsIndirect,
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const SDValue &N);
|
2015-03-20 04:41:48 +08:00
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/// Return the next block after MBB, or nullptr if there is none.
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MachineBasicBlock *NextBlock(MachineBasicBlock *MBB);
|
2015-04-14 01:16:45 +08:00
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/// Update the DAG and DAG builder with the relevant information after
|
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|
/// a new root node has been created which could be a tail call.
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|
|
void updateDAGForMaybeTailCall(SDValue MaybeTC);
|
2008-09-04 00:12:24 +08:00
|
|
|
};
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|
2015-05-06 07:06:54 +08:00
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/// RegsForValue - This struct represents the registers (physical or virtual)
|
|
|
|
/// that a particular set of values is assigned, and the type information about
|
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|
|
/// the value. The most common situation is to represent one value at a time,
|
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|
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/// but struct or array values are handled element-wise as multiple values. The
|
|
|
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/// splitting of aggregates is performed recursively, so that we never have
|
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|
|
/// aggregate-typed registers. The values at this point do not necessarily have
|
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|
|
/// legal types, so each value may require one or more registers of some legal
|
|
|
|
/// type.
|
|
|
|
///
|
|
|
|
struct RegsForValue {
|
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|
|
/// ValueVTs - The value types of the values, which may not be legal, and
|
|
|
|
/// may need be promoted or synthesized from one or more registers.
|
|
|
|
///
|
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|
|
SmallVector<EVT, 4> ValueVTs;
|
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|
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|
|
|
|
/// RegVTs - The value types of the registers. This is the same size as
|
|
|
|
/// ValueVTs and it records, for each value, what the type of the assigned
|
|
|
|
/// register or registers are. (Individual values are never synthesized
|
|
|
|
/// from more than one type of register.)
|
|
|
|
///
|
|
|
|
/// With virtual registers, the contents of RegVTs is redundant with TLI's
|
|
|
|
/// getRegisterType member function, however when with physical registers
|
|
|
|
/// it is necessary to have a separate record of the types.
|
|
|
|
///
|
|
|
|
SmallVector<MVT, 4> RegVTs;
|
|
|
|
|
|
|
|
/// Regs - This list holds the registers assigned to the values.
|
|
|
|
/// Each legal or promoted value requires one register, and each
|
|
|
|
/// expanded value requires multiple registers.
|
|
|
|
///
|
|
|
|
SmallVector<unsigned, 4> Regs;
|
|
|
|
|
|
|
|
RegsForValue();
|
|
|
|
|
|
|
|
RegsForValue(const SmallVector<unsigned, 4> ®s, MVT regvt, EVT valuevt);
|
|
|
|
|
2015-07-09 09:57:34 +08:00
|
|
|
RegsForValue(LLVMContext &Context, const TargetLowering &TLI,
|
|
|
|
const DataLayout &DL, unsigned Reg, Type *Ty);
|
2015-05-06 07:06:54 +08:00
|
|
|
|
|
|
|
/// append - Add the specified values to this one.
|
|
|
|
void append(const RegsForValue &RHS) {
|
|
|
|
ValueVTs.append(RHS.ValueVTs.begin(), RHS.ValueVTs.end());
|
|
|
|
RegVTs.append(RHS.RegVTs.begin(), RHS.RegVTs.end());
|
|
|
|
Regs.append(RHS.Regs.begin(), RHS.Regs.end());
|
|
|
|
}
|
|
|
|
|
|
|
|
/// getCopyFromRegs - Emit a series of CopyFromReg nodes that copies from
|
|
|
|
/// this value and returns the result as a ValueVTs value. This uses
|
|
|
|
/// Chain/Flag as the input and updates them for the output Chain/Flag.
|
|
|
|
/// If the Flag pointer is NULL, no flag is used.
|
|
|
|
SDValue getCopyFromRegs(SelectionDAG &DAG, FunctionLoweringInfo &FuncInfo,
|
|
|
|
SDLoc dl,
|
|
|
|
SDValue &Chain, SDValue *Flag,
|
|
|
|
const Value *V = nullptr) const;
|
|
|
|
|
2015-05-06 07:06:57 +08:00
|
|
|
/// getCopyToRegs - Emit a series of CopyToReg nodes that copies the specified
|
|
|
|
/// value into the registers specified by this object. This uses Chain/Flag
|
|
|
|
/// as the input and updates them for the output Chain/Flag. If the Flag
|
|
|
|
/// pointer is nullptr, no flag is used. If V is not nullptr, then it is used
|
|
|
|
/// in printing better diagnostic messages on error.
|
2015-05-06 07:06:54 +08:00
|
|
|
void
|
|
|
|
getCopyToRegs(SDValue Val, SelectionDAG &DAG, SDLoc dl, SDValue &Chain,
|
2015-05-06 07:06:57 +08:00
|
|
|
SDValue *Flag, const Value *V = nullptr,
|
2015-05-06 07:06:54 +08:00
|
|
|
ISD::NodeType PreferredExtendType = ISD::ANY_EXTEND) const;
|
|
|
|
|
|
|
|
/// AddInlineAsmOperands - Add this value to the specified inlineasm node
|
|
|
|
/// operand list. This adds the code marker, matching input operand index
|
|
|
|
/// (if applicable), and includes the number of values added into it.
|
|
|
|
void AddInlineAsmOperands(unsigned Kind,
|
|
|
|
bool HasMatching, unsigned MatchingIdx, SDLoc dl,
|
|
|
|
SelectionDAG &DAG,
|
|
|
|
std::vector<SDValue> &Ops) const;
|
|
|
|
};
|
|
|
|
|
2008-09-04 00:12:24 +08:00
|
|
|
} // end namespace llvm
|
|
|
|
|
|
|
|
#endif
|