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llvm-project/llvm/test/CodeGen/AArch64/arm64-ldst-unscaled-pre-pos...

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[AArch64] Fix an assertion for pre-index generation with unscaled loads/stores. Differential Revision: https://reviews.llvm.org/D36248 PR34035 llvm-svn: 310066
2017-08-05 00:44:06 +08:00
# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass aarch64-ldst-opt -verify-machineinstrs -o - %s | FileCheck %s
---
# CHECK-LABEL: name: test_LDURSi_post
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
# CHECK: LDRSpost $x0, -4
[AArch64] Fix an assertion for pre-index generation with unscaled loads/stores. Differential Revision: https://reviews.llvm.org/D36248 PR34035 llvm-svn: 310066
2017-08-05 00:44:06 +08:00
name: test_LDURSi_post
body: |
bb.0.entry:
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
liveins: $x0
[AArch64] Fix an assertion for pre-index generation with unscaled loads/stores. Differential Revision: https://reviews.llvm.org/D36248 PR34035 llvm-svn: 310066
2017-08-05 00:44:06 +08:00
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
$s0 = LDURSi $x0, 0
$x0 = SUBXri $x0, 4, 0
RET_ReallyLR implicit $x0
[AArch64] Fix an assertion for pre-index generation with unscaled loads/stores. Differential Revision: https://reviews.llvm.org/D36248 PR34035 llvm-svn: 310066
2017-08-05 00:44:06 +08:00
...
# CHECK-LABEL: name: test_LDURDi_post
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
# CHECK: LDRDpost $x0, -4
[AArch64] Fix an assertion for pre-index generation with unscaled loads/stores. Differential Revision: https://reviews.llvm.org/D36248 PR34035 llvm-svn: 310066
2017-08-05 00:44:06 +08:00
name: test_LDURDi_post
body: |
bb.0.entry:
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
liveins: $x0
[AArch64] Fix an assertion for pre-index generation with unscaled loads/stores. Differential Revision: https://reviews.llvm.org/D36248 PR34035 llvm-svn: 310066
2017-08-05 00:44:06 +08:00
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
$d0 = LDURDi $x0, 0
$x0 = SUBXri $x0, 4, 0
RET_ReallyLR implicit $x0
[AArch64] Fix an assertion for pre-index generation with unscaled loads/stores. Differential Revision: https://reviews.llvm.org/D36248 PR34035 llvm-svn: 310066
2017-08-05 00:44:06 +08:00
...
# CHECK-LABEL: name: test_LDURQi_post
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
# CHECK: LDRQpost $x0, -4
[AArch64] Fix an assertion for pre-index generation with unscaled loads/stores. Differential Revision: https://reviews.llvm.org/D36248 PR34035 llvm-svn: 310066
2017-08-05 00:44:06 +08:00
name: test_LDURQi_post
body: |
bb.0.entry:
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
liveins: $x0
[AArch64] Fix an assertion for pre-index generation with unscaled loads/stores. Differential Revision: https://reviews.llvm.org/D36248 PR34035 llvm-svn: 310066
2017-08-05 00:44:06 +08:00
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
$q0 = LDURQi $x0, 0
$x0 = SUBXri $x0, 4, 0
RET_ReallyLR implicit $x0
[AArch64] Fix an assertion for pre-index generation with unscaled loads/stores. Differential Revision: https://reviews.llvm.org/D36248 PR34035 llvm-svn: 310066
2017-08-05 00:44:06 +08:00
...
# CHECK-LABEL: name: test_LDURWi_post
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
# CHECK: LDRWpost $x0, -4
[AArch64] Fix an assertion for pre-index generation with unscaled loads/stores. Differential Revision: https://reviews.llvm.org/D36248 PR34035 llvm-svn: 310066
2017-08-05 00:44:06 +08:00
name: test_LDURWi_post
body: |
bb.0.entry:
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
liveins: $x0
[AArch64] Fix an assertion for pre-index generation with unscaled loads/stores. Differential Revision: https://reviews.llvm.org/D36248 PR34035 llvm-svn: 310066
2017-08-05 00:44:06 +08:00
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
$w1 = LDURWi $x0, 0
$x0 = SUBXri $x0, 4, 0
RET_ReallyLR implicit $x0
[AArch64] Fix an assertion for pre-index generation with unscaled loads/stores. Differential Revision: https://reviews.llvm.org/D36248 PR34035 llvm-svn: 310066
2017-08-05 00:44:06 +08:00
...
# CHECK-LABEL: name: test_LDURXi_post
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
# CHECK: $x1 = LDRXpost $x0, -4
[AArch64] Fix an assertion for pre-index generation with unscaled loads/stores. Differential Revision: https://reviews.llvm.org/D36248 PR34035 llvm-svn: 310066
2017-08-05 00:44:06 +08:00
name: test_LDURXi_post
body: |
bb.0.entry:
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
liveins: $x0
[AArch64] Fix an assertion for pre-index generation with unscaled loads/stores. Differential Revision: https://reviews.llvm.org/D36248 PR34035 llvm-svn: 310066
2017-08-05 00:44:06 +08:00
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
$x1 = LDURXi $x0, 0
$x0 = SUBXri $x0, 4, 0
RET_ReallyLR implicit $x0
[AArch64] Fix an assertion for pre-index generation with unscaled loads/stores. Differential Revision: https://reviews.llvm.org/D36248 PR34035 llvm-svn: 310066
2017-08-05 00:44:06 +08:00
...
# CHECK-LABEL: name: test_STURSi_post
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
# CHECK: STRSpost $s0, $x0, -4
[AArch64] Fix an assertion for pre-index generation with unscaled loads/stores. Differential Revision: https://reviews.llvm.org/D36248 PR34035 llvm-svn: 310066
2017-08-05 00:44:06 +08:00
name: test_STURSi_post
body: |
bb.0.entry:
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
liveins: $x0
[AArch64] Fix an assertion for pre-index generation with unscaled loads/stores. Differential Revision: https://reviews.llvm.org/D36248 PR34035 llvm-svn: 310066
2017-08-05 00:44:06 +08:00
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
$s0 = FMOVS0
STURSi $s0, $x0, 0
$x0 = SUBXri $x0, 4, 0
RET_ReallyLR implicit $x0
[AArch64] Fix an assertion for pre-index generation with unscaled loads/stores. Differential Revision: https://reviews.llvm.org/D36248 PR34035 llvm-svn: 310066
2017-08-05 00:44:06 +08:00
...
# CHECK-LABEL: name: test_STURDi_post
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
# CHECK: STRDpost $d0, $x0, -4
[AArch64] Fix an assertion for pre-index generation with unscaled loads/stores. Differential Revision: https://reviews.llvm.org/D36248 PR34035 llvm-svn: 310066
2017-08-05 00:44:06 +08:00
name: test_STURDi_post
body: |
bb.0.entry:
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
liveins: $x0
[AArch64] Fix an assertion for pre-index generation with unscaled loads/stores. Differential Revision: https://reviews.llvm.org/D36248 PR34035 llvm-svn: 310066
2017-08-05 00:44:06 +08:00
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
$d0 = FMOVD0
STURDi $d0, $x0, 0
$x0 = SUBXri $x0, 4, 0
RET_ReallyLR implicit $x0
[AArch64] Fix an assertion for pre-index generation with unscaled loads/stores. Differential Revision: https://reviews.llvm.org/D36248 PR34035 llvm-svn: 310066
2017-08-05 00:44:06 +08:00
...
# CHECK-LABEL: name: test_STURQi_post
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
# CHECK: STRQpost $q0, $x0, -4
[AArch64] Fix an assertion for pre-index generation with unscaled loads/stores. Differential Revision: https://reviews.llvm.org/D36248 PR34035 llvm-svn: 310066
2017-08-05 00:44:06 +08:00
name: test_STURQi_post
body: |
bb.0.entry:
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
liveins: $x0
[AArch64] Fix an assertion for pre-index generation with unscaled loads/stores. Differential Revision: https://reviews.llvm.org/D36248 PR34035 llvm-svn: 310066
2017-08-05 00:44:06 +08:00
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
$q0 = MOVIv4i32 0, 0
STURQi $q0, $x0, 0
$x0 = SUBXri $x0, 4, 0
RET_ReallyLR implicit $x0
[AArch64] Fix an assertion for pre-index generation with unscaled loads/stores. Differential Revision: https://reviews.llvm.org/D36248 PR34035 llvm-svn: 310066
2017-08-05 00:44:06 +08:00
...
# CHECK-LABEL: name: test_STURWi_post
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
# CHECK: STRWpost $wzr, $x0, -4
[AArch64] Fix an assertion for pre-index generation with unscaled loads/stores. Differential Revision: https://reviews.llvm.org/D36248 PR34035 llvm-svn: 310066
2017-08-05 00:44:06 +08:00
name: test_STURWi_post
body: |
bb.0.entry:
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
liveins: $x0
[AArch64] Fix an assertion for pre-index generation with unscaled loads/stores. Differential Revision: https://reviews.llvm.org/D36248 PR34035 llvm-svn: 310066
2017-08-05 00:44:06 +08:00
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
STURWi $wzr, $x0, 0
$x0 = SUBXri $x0, 4, 0
RET_ReallyLR implicit $x0
[AArch64] Fix an assertion for pre-index generation with unscaled loads/stores. Differential Revision: https://reviews.llvm.org/D36248 PR34035 llvm-svn: 310066
2017-08-05 00:44:06 +08:00
...
# CHECK-LABEL: name: test_STURXi_post
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
# CHECK: STRXpost $xzr, $x0, -4
[AArch64] Fix an assertion for pre-index generation with unscaled loads/stores. Differential Revision: https://reviews.llvm.org/D36248 PR34035 llvm-svn: 310066
2017-08-05 00:44:06 +08:00
name: test_STURXi_post
body: |
bb.0.entry:
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
liveins: $x0
[AArch64] Fix an assertion for pre-index generation with unscaled loads/stores. Differential Revision: https://reviews.llvm.org/D36248 PR34035 llvm-svn: 310066
2017-08-05 00:44:06 +08:00
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
STURXi $xzr, $x0, 0
$x0 = SUBXri $x0, 4, 0
RET_ReallyLR implicit $x0
[AArch64] Fix an assertion for pre-index generation with unscaled loads/stores. Differential Revision: https://reviews.llvm.org/D36248 PR34035 llvm-svn: 310066
2017-08-05 00:44:06 +08:00
...